參數(shù)資料
型號: HYM368025S
廠商: SIEMENS AG
英文描述: 8M x 36-Bit EDO - DRAM Module
中文描述: 8米× 36位EDO公司-記憶體模組
文件頁數(shù): 5/10頁
文件大?。?/td> 104K
代理商: HYM368025S
Semiconductor Group
5
HYM 368025S/GS-50/-60
8M
×
36-Bit EDO-Module
Absolute Maximum Ratings
Operation temperature range .........................................................................................
Storage temperature range.........................................................................................
Input/output voltage ............................................................................ –0.5V to min (Vcc+0.5, 7.0) V
Power supply voltage......................................................................................................
Power dissipation...................................................................................................................
Data out current (short circuit) ................................................................................................
0 to + 70 °C
– 55 to 125 °C
– 1 to + 7 V
9.24 W
50 mA
Note:
Stresses above those listed under "Absolute Maximum Ratings" may cause permanent
damage of the device. Exposure to absolute maximum rating conditions for extended periods
may affect device reliability.
DC Characteristics
T
A
= 0 to 70 °C,
V
CC
= 5 V
±
10 %
Parameter
Symbol
Limit Values
Unit
Test
Condition
min.
max.
Input high voltage
V
IH
V
IL
V
OH
V
OL
I
I(L)
2.4
Vcc+0.5
V
1)
Input low voltage
Output high voltage (
I
OUT
= – 5 mA)
Output low voltage (
I
OUT
= 4.2 mA)
Input leakage current
(0 V <
V
IN
< 6.5 V, all other pins = 0 V)
Output leakage current
(DO is disabled, 0 V <
V
OUT
< 5.5 V)
Average
V
CC
supply current
(RAS, CAS, address cycling,
t
RC
=
t
RC
min)
– 0.5
0.8
V
1)
2.4
V
1)
0.4
V
μ
A
1)
– 20
20
1)
I
O(L)
– 20
20
μ
A
1)
-50 version
-60 version
I
CC1
1240
1120
mA
mA
2),3),4)
Standby
V
CC
supply current
(RAS = CAS =
V
IH
)
Average
V
CC
supply current
during RAS only refresh cycles (per bank)
(RAS cycling, CAS =
V
IH
,
t
RC
=
t
RC
min)
I
CC2
48
mA
-50 version
-60 version
I
CC3
1240
1120
mA
mA
2),4)
相關(guān)PDF資料
PDF描述
HYM368025S-50 8M x 36-Bit EDO - DRAM Module
HYM368025S-60 8M x 36-Bit EDO - DRAM Module
HYM368025GS-50 8M x 36-Bit EDO - DRAM Module
HYM368025GS-60 8M x 36-Bit EDO - DRAM Module
HYS 64V64220GU 3.3 V 64M 64-Bit SDRAM Modules(3.3 V 64M 64/72-Bit 2 個存儲體的 SDRAM 模塊)
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