參數(shù)資料
型號: HYB25D256160BT-7F
廠商: INFINEON TECHNOLOGIES AG
英文描述: 256 Mbit Double Data Rate SDRAM
中文描述: 256兆雙倍數(shù)據(jù)速率SDRAM
文件頁數(shù): 76/94頁
文件大?。?/td> 3326K
代理商: HYB25D256160BT-7F
Data Sheet
78
Rev. 1.6, 2004-12
HYB25D256[16/40/80]0C[E/C/F/T](L)
256 Mbit Double-Data-Rate SDRAM
Timing Diagrams
5.2
Read Command: Data Output Timing
Figure 40 shows DQS versus DQ Timing during read burst.
Figure 40
Data Output (Read), Timing Burst Length = 4
tQH (Data output hold time from DQS)
tDQSQ and tQH are only shown once and are shown referenced to different edges of DQS, only for clarify of illustration.
.
DQS
DQ
t
DQSQ max
t
QH
tDQSQ and tQH both apply to each of the four relevant edges of DQS.
tDQSQ max. is used to determine the worst case setup time for controller data capture.
tQH is used to determine the worst case hold time for controller data capture.
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