參數(shù)資料
型號(hào): HYB25D128800CT-6
廠商: INFINEON TECHNOLOGIES AG
英文描述: 128 Mbit Double Data Rate SDRAM
中文描述: 128兆雙倍數(shù)據(jù)速率SDRAM
文件頁(yè)數(shù): 72/85頁(yè)
文件大?。?/td> 2653K
代理商: HYB25D128800CT-6
Data Sheet
72
Rev. 1.0, 2004-04
HYB25D128[400/800/160]C[C/E/T](L)
128 Mbit Double Data Rate SDRAM
Timing Diagrams
5
Timing Diagrams
Figure 38
Data Input (Write), Timing Burst Length = 4
Figure 39
Data Output (Read), Timing Burst Length = 4
t
DH
t
DS
t
DH
t
DS
t
DQSL
DI n = Data In for column n.
3 subsequent elements of data in are applied in programmed order following DI n.
DI n
DQS
DQ
DM
Don’t Care
t
DQSH
t
QH
(Data output hold time from DQS)
t
DQSQ
and t
QH
are only shown once and are shown referenced to different edges of DQS, only for clarify of illustration.
.
t
DQSQ
and t
QH
both apply to each of the four relevant edges of DQS.
DQS
DQ
t
DQSQ max
t
QH
t
DQSQ max.
is used to determine the worst case setup time for controller data capture.
t
QH
is used to determine the worst case hold time for controller data capture.
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