參數(shù)資料
型號(hào)： HYB25D128800CT-6
廠商： INFINEON TECHNOLOGIES AG
英文描述： 128 Mbit Double Data Rate SDRAM
中文描述： 128兆雙倍數(shù)據(jù)速率SDRAM
文件頁(yè)數(shù)： 25/85頁(yè)
文件大?。?/td> 2653K
代理商： HYB25D128800CT-6
Data Sheet
25
Rev. 1.0, 2004-04
HYB25D128[400/800/160]C[C/E/T](L)
128 Mbit Double Data Rate SDRAM
Functional Description
3.4
Commands
Deselect
The Deselect function prevents new commands from being executed by the DDR SDRAM. The DDR SDRAM is
effectively deselected. Operations already in progress are not affected.
No Operation (NOP)
The No Operation (NOP) command is used to perform a NOP to a DDR SDRAM. This prevents unwanted
commands from being registered during idle or wait states. Operations already in progress are not affected.
Mode Register Set
The mode registers are loaded via inputs A0-A11, BA0 and BA1. See mode register descriptions in
Chapter 3.2
.
The Mode Register Set command can only be issued when all banks are idle and no bursts are in progress. A
subsequent executable command cannot be issued until
t
MRD
is met.
Active
The Active command is used to open (or activate) a row in a particular bank for a subsequent access. The value
on the BA0, BA1 inputs selects the bank, and the address provided on inputs A0-A11 selects the row. This row
remains active (or open) for accesses until a Precharge (or Read or Write with Auto Precharge) is issued to that
bank. A Precharge (or Read or Write with Auto Precharge) command must be issued and completed before
opening a different row in the same bank.
Read
The Read command is used to initiate a burst read access to an active (open) row. The value on the BA0, BA1
inputs selects the bank, and the address provided on inputs A0-Ai, Aj (where [i = 8, j = don’t care] for x16, [i = 9,
j = don’t care] for x8 and [i = 9, j = 11] for x4) selects the starting column location. The value on input A10
determines whether or not Auto Precharge is used. If Auto Precharge is selected, the row being accessed is
precharged at the end of the Read burst; if Auto Precharge is not selected, the row remains open for subsequent
accesses.
Write
The Write command is used to initiate a burst write access to an active (open) row. The value on the BA0, BA1
inputs selects the bank, and the address provided on inputs A0-Ai, Aj (where [i = 9, j = don’t care] for x8; where
[i = 9, j = 11] for x4) selects the starting column location. The value on input A10 determines whether or not Auto
Precharge is used. If Auto Precharge is selected, the row being accessed is precharged at the end of the Write
burst; if Auto Precharge is not selected, the row remains open for subsequent accesses. Input data appearing on
the DQs is written to the memory array subject to the DM input logic level appearing coincident with the data. If a
given DM signal is registered low, the corresponding data is written to memory; if the DM signal is registered high,
the corresponding data inputs are ignored, and a Write is not executed to that byte/column location.
Precharge
The Precharge command is used to deactivate (close) the open row in a particular bank or the open row(s) in all
banks. The bank(s) will be available for a subsequent row access a specified time (
t
RP
) after the Precharge
command is issued. Input A10 determines whether one or all banks are to be precharged, and in the case where
only one bank is to be precharged, inputs BA0, BA1 select the bank. Otherwise BA0, BA1 are treated as “Don’t
Care”. Once a bank has been precharged, it is in the idle state and must be activated prior to any Read or Write
commands being issued to that bank. A precharge command is treated as a NOP if there is no open row in that
bank, or if the previously open row is already in the process of precharging.
相關(guān)PDF資料
PDF描述
HYB25D128800CTL-6 128 Mbit Double Data Rate SDRAM
HYB25D256160BTL-7 256-Mbit Double Data Rate SDRAM, Die Rev. B
HYB25D256160BTL-7F 256-Mbit Double Data Rate SDRAM, Die Rev. B
HYB25D256160BTL-8 256-Mbit Double Data Rate SDRAM, Die Rev. B
HYB25D256400BC-7F 256-Mbit Double Data Rate SDRAM, Die Rev. B
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
HYB25D128800CTL-6 制造商:INFINEON 制造商全稱:Infineon Technologies AG 功能描述:128 Mbit Double Data Rate SDRAM
HYB25D128800T-7 制造商:Infineon Technologies AG 功能描述:
HYB25D128800T-7.5 制造商:未知廠家 制造商全稱:未知廠家 功能描述:?128Mb (16Mx8) DDR 266B (2.5-3-3)?
HYB25D128800TC-3 制造商:INFINEON 制造商全稱:Infineon Technologies AG 功能描述:MEMORY SPECTRUM
HYB25D128800TC-37 制造商:INFINEON 制造商全稱:Infineon Technologies AG 功能描述:MEMORY SPECTRUM
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