參數(shù)資料
型號: HYB25D128323C-L4.5
廠商: INFINEON TECHNOLOGIES AG
英文描述: 128 Mbit DDR SGRAM
中文描述: 128兆的DDR SGRAM
文件頁數(shù): 23/53頁
文件大?。?/td> 1166K
代理商: HYB25D128323C-L4.5
Data Sheet
23
V1.7, 2003-07
HYB25D128323C[-3/-3.3/-3.6/-4.5/-5.0/L3.6/L4.5]
128 Mbit DDR SGRAM [4M x 32]
Register Set
Figure 14
Self Refresh timing
3.5.7
The auto refresh function is initiated by issuing an Auto Refresh command at the rising edge of the clock. All banks
must be precharged and idle before the Auto Refresh command is applied. No control of the external address pins
is required once this cycle has started. All necessary addresses are generated in the device itself. When the
refresh cycle has completed, all banks will be in the idle state. A delay between the Auto Refresh command and
the next Activate Command or subsequent Auto Refresh Command must be greater than or equal to the
t
RFC
(min).
Auto Refresh
Figure 15
Autorefresh timing
3.5.8
The Power Down Mode is entered when CKE is set low and exited when CKE is set high. The CKE signal is
sampled at the rising edge of the clock. Once the Power Down Mode is initiated, all of the receiver circuits except
CLK, CKE and DLL circuits are gated off to reduce power consumption. All banks can be set to idle state or stay
activate during Power Down Mode, but burst activity may not be performed. After exiting from Power Down Mode,
at least one clock cycle of command delay must be inserted before starting a new command. During Power Down
Mode, refresh operations cannot be performed; therefore, the device cannot remain in Power Down Mode longer
than the refresh period (
t
REF
) of the device.
Power Down Mode
Clk
Command
NOP
t
SREX
CKE
SELF
REFRESH
NOP
DESEL
NOP
DESEL
NOP
DESEL
NOP
DESEL
Any
Comm.
Clk
Command
NOP
t
RFC
CKE
PRE-
CHARGE
AUTO
REFRESH
Command
t
RP
NOP
Command is
AUTOREFRESH
or ACT
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