參數(shù)資料
型號(hào)： HWD2119
廠商： Electronic Theatre Controls, Inc.
英文描述： 350mWAudio Power Amplifier with Shutdown Mode
中文描述： 350mWAudio功率放大器關(guān)斷模式
文件頁(yè)數(shù)： 9/21頁(yè)
文件大?。?/td> 877K
代理商： HWD2119
Application Information
BRIDGE CONFIGURATION EXPLANATION
As shown in Figure 1 the
HWD
21
19 consist of two operational
amplifiers. External resistors, R
i
and R
F
set the closed-loop
gain of the first amplifier (and the amplifier overall), whereas
two internal 20k
resistors set the second amplifier’s gain at
-1. The
HWD
21
19 is typically used to drive a speaker con-
nected between the two amplifier outputs.
Figure 1 shows that the output of Amp1 servers as the input
to Amp2, which results in both amplifiers producing signals
identical in magnitude but 180 out of phase. Taking advan-
tage of this phase difference, a load is placed between V
and V
and driven differentially (commonly referred to as
’bridge mode’). This results in a differential gain of
A
VD
= 2 *(R
f
/R
i
)
Bridge mode is different from single-ended amplifiers that
drive loads connected between a single amplifier’s output
and ground. For a given supply voltage, bridge mode has a
distinct advantage over the single-ended configuration: its
differential output doubles the voltage swing across the load.
This results in four times the output power when compared
to a single-ended amplifier under the same conditions. This
increase in attainable output assumes that the amplifier is
not current limited or the output signal is not clipped. To
ensure minimum output signal clipping when choosing an
amplifier’s closed-loop gain, refer to the
Audio Power Am-
plifier Design Example
section.
Another advantage of the differential bridge output is no net
DC voltage across the load. This results from biasing V
01
and V
02
at half-supply. This eliminates the coupling capacitor
that single supply, single-ended amplifiers require. Eliminat-
ing an output coupling capacitor in a single-ended configu-
ration forces a single supply amplifier’s half-supply bias volt-
age across the load. The current flow created by the half-
supply bias voltage increases internal IC power dissipation
and may permanently damage loads such as speakers.
(1)
POWER DISSIPATION
Power dissipation is a major concern when designing a
successful bridged or single-ended amplifier. Equation (2)
states the maximum power dissipation point for a single-
ended amplifier operating at a given supply voltage and
driving a specified load.
P
DMAX
= (V
DD
)
2
/(2
π
2
R
L
) (W) Single-ended
However, a direct consequence of the increased power de-
livered to the load by a bridged amplifier is an increase in the
internal power dissipation point for a bridge amplifier oper-
ating at the same given conditions. Equation (3) states the
maximum power dissipation point for a bridged amplifier
operating at a given supply voltage and driving a specified
load.
P
DMAX
= 4(V
DD
)
2
/(2
π
2
R
L
) (W) Bridge Mode
The
HWD
21
19 has two operational amplifiers in one package
and the maximum internal power dissipation is four times
that of a single-ended amplifier. However, even with this
substantial increase in power dissipation, the
HWD
21
19 does
not require heatsinking. From Equation (3), assuming a 5V
power supply and an 8
load, the maximum power dissipa-
tion point is 633mW. The maximum power dissipation point
obtained from Equation (3) must not exceed the power dis-
sipation predicted by Equation (4):
P
DMAX
= (T
JMAX
- T
A
)/
θ
JA
(W)
(2)
(3)
(4)
For the micro MUA08A package,
θ
= 210C/W, for the
M08A package,
θ
JA
= 170C/W , and T
JMAX
= 150C for the
HWD
21
19. For a given ambient temperature, T
can be used to find the maximum internal power dissipation
supported by the IC packaging. If the result of Equation (3) is
greater than the result of Equation (4), then decrease the
supply voltage, increase the load impedance, or reduce the
ambient temperature. For a typical application using the
M08A packaged
HWD
21
19 with a 5V power supply and an 8
load, the maximum ambient temperature that does not vio-
late the maximum junction temperature is approximately
42C. If a MUA08A packaged part is used instead with the
same supply voltage and load, the maximum ambient tem-
perature is 17C. In both cases, it is assumed that a device
is a surface mount part operating around the maximum
power dissipation point. The assumption that the device is
operating around the maximum power dissipation point is
incorrect for an 8
load. The maximum power dissipation
point occurs when the output power is equal to the maximum
power dissipation or 50% efficiency. The
HWD
21
19 is not
capable of the output power level (633mW) required to op-
erate at the maximum power dissipation point for an 8
load.
To find the maximum power dissipation, the graph
Power
Dissipation vs. Output Power
must be used. From the
graph, the maximum power dissipation for an 8
load and a
5V supply is approximately 575mW. Substituting this value
back into equation (4) for P
and using
θ
= 210C/W
for the MUA08A package, the maximum ambient tempera-
ture is calculated to be 29C. Using
θ
JA
= 170C/W for the
M08A package, the maximum ambient temperature is 52C.
Refer to the
Typical Performance Characteristics
curves
for power dissipation information for lower output powers
and maximum power dissipation for each package at a given
ambient temperature.
, Equation (4)
POWER SUPPLY BYPASSING
As with any power amplifier, proper supply bypassing is
critical for low noise performance and high power supply
rejection. The capacitors connected to the bypass and power
supply pins should be placed as close to the
HWD
21
19 as
possible. The capacitor connected between the bypass pin
and ground improves the internal bias voltage’s stability,
producing improved PSRR. The improvements to PSRR
increase as the bypass pin capacitor value increases. Typi-
cal applications employ a 5V regulator with 10μF and 0.1μF
filter capacitors that aid in supply stability. Their presence,
however, does not eliminate the need for bypassing the
supply nodes of the
HWD
21
19. The selection of bypass ca-
pacitor values, especially C
, depends on desired PSRR
requirements, click and pop performance as explained in the
section,
Proper Selection of External Components,
as
well as system cost and size constraints.
SHUTDOWN FUNCTION
The voltage applied to the
HWD
21
19’s SHUTDOWN pin con-
trols the shutdown function. Activate micro-power shutdown
by applying V
DD
to the SHUTDOWN pin. When active, the
HWD
21
19’s micro-power shutdown feature turns off the ampli-
fier’s bias circuitry, reducing the supply current. The logic
threshold is typically 1/2V
. The low 0.7μA typical shut-
down current is achieved by applying a voltage that is as
near as V
as possible to the SHUTDOWN pin. A voltage
that is less than V
may increase the shutdown current.
Avoid intermittent or unexpected micro-power shutdown by
ensuring that the SHUTDOWN pin is not left floating but
connected to either V
DD
or GND.
9
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