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參數(shù)資料
| 型號： | HT49R30A-1 |
| 廠商： | Holtek Semiconductor Inc. |
| 英文描述： | DISPL 7 SEG YELLOW |
| 中文描述： | 8位LCD型微控制器 |
| 文件頁數(shù)： | 9/43頁 |
| 文件大?。?/td> | 353K |
| 代理商： | HT49R30A-1 |
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HT49R30A-1/HT49C30-1/HT49C30L
Rev. 1.10
9
September 25, 2002
When a control transfer takes place, an additional
dummy cycle is required.
Program memory
ROM
The program memory is used to store the program in-
structions which are to be executed. It also contains
data, table, and interrupt entries, and is organized into
2048 14 bits which are addressed by the PC and table
pointer.
Certain locations in the ROM are reserved for special
usage:
Location 000H
Location 000H is reserved for program initialization.
After chip reset, the program always begins execution
at this location.
Location 004H
Location 004H is reserved for the external interrupt
service program. If the INT0 input pin is activated, and
the interrupt is enabled, and the stack is not full, the
program begins execution at location 004H.
Location 008H
Location 008H is reserved for the external interrupt
serviceprogramalso.IftheINT1inputpinisactivated,
and the interrupt is enabled, and the stack is not full,
the program begins execution at location 008H.
Location 00CH
Location 00CH is reserved for the timer/event counter
interrupt service program. If a timer interrupt results
from a timer/event counter overflow, and if the inter-
rupt is enabled and the stack is not full, the program
begins execution at location 00CH.
Location 010H
Location 010H is reserved for the Time Base interrupt
service program. If a Time Base interrupt occurs, and
the interrupt is enabled, and the stack is not full, the
program begins execution at location 010H.
Location 014H
Location 014H is reserved for the real time clock inter-
rupt service program. If a real time clock interrupt oc-
curs, and the interrupt is enabled, and the stack is not
full, the program begins execution at location 014H.
Table location
Any location in the ROM can be used as a look-up ta-
ble. The instructions TABRDC [m] (the current page,
1 page=256 words) and TABRDL [m] (the last page)
transfer the contents of the lower-order byte to the
specified data memory, and the contents of the
higher-order byte to TBLH (Table Higher-order byte
register)(08H).Onlythedestinationofthelower-order
byte in the table is well-defined; the other bits of the ta-
ble word are all transferred to the lower portion of
TBLH, and the remaining 2 bit is read as 0 . The
TBLH is read only, and the table pointer (TBLP) is a
read/write register (07H), indicating the table location.
Before accessing the table, the location should be
placed in TBLP. All the table related instructions re-
quire 2 cycles to complete the operation. These areas
may function as a normal ROM depending upon the
user s requirements.
Stack register
STACK
The stack register is a special part of the memory used
to save the contents of the PC. The stack is organized
into 4 levels and is neither part of the data nor part of the
program, and is neither readable nor writeable. Its acti-
vated level is indexed by a stack pointer (SP) and is nei-
ther readable nor writeable. At a commencement of a
subroutine call or an interrupt acknowledgment, the
contents of the PC is pushed onto the stack. At the end
of the subroutine or interrupt routine, signaled by a re-
turn instruction (RET or RETI), the contents of the PC is
( ( ( 4
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= ' 7 3 5 ' C
9
:
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= ' 7 3 5 ' C
9
Program memory
Instruction(s)
Table Location
*10
*9
*8
*7
*6
*5
*4
*3
*2
*1
*0
TABRDC [m]
P10
P9
P8
@7
@6
@5
@4
@3
@2
@1
@0
TABRDL [m]
1
1
1
@7
@6
@5
@4
@3
@2
@1
@0
Table location
Note: *10~*0: Table location bits
P10~P8: Current program counter bits
@7~@0: Table pointer bits
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