HT48RB8
Rev. 1.30
23
February 10, 2003
There is a system clock control register implemented to select the clock used in the MCU. This register consists of USB
clock control bit (USBCKEN), second suspend mode control bit (SUSP2) and system clock selection (SYSCLK).
SCC
Bits
R/W
Function
2~0
Undefined bits
USBCKEN
3
R/W
USB clock control bit. When this bit is set to 1 , it indicates that the USB clock is en-
abled. Otherwise, the USB clock is turned-off. (Default= 0 )
SUSP2
4
R/W
This bit is used for decreasing power consumption in suspend mode.
In normal mode clean this bit=0 (Default= 0 )
In HALT mode set this bit=1 for decreasing power consumption.
5
R/W Undefined, should be cleared to 0
SYSCLK
6
R/W
This bit is used to specify the system oscillator frequency used by MCU. If a 6MHz
crystal oscillator or resonator is used, this bit should be set to 1 . If a 12MHz crystal
oscillator or resonator is used, this bit should be cleared to 0 (default).
7
This bit should be forced to 0
The A/D converter implemented in the MCU is a 6-channel 8-bit A/D converter. The reference voltage (high reference
voltage and low reference voltage) can be selected as coming from external pins (PB6/VRL and PB7/VRH) or internal
power supplies of MCU (VDD and VSS). The VRL and VRH are used to set the minimal and maximal boundaries of the
full-scalerangeoftheA/Dconverter.Ifananaloginputs,VRLorVRHisnotusedforA/Dconversion,italsocanbeused
as a general purpose I/O line. The ADSC (A/D converter status and control register) register is used to set the configu-
rations and A/D clock sources of A/D converter and control the operation of A/D converter.
ADSC
Bits
Function
ACS2~ACS0
2~0
These 3 bits are use to select one of eight A/D converter channels for the conversion. The
A/D converter input channels AN0~AN5 are pin-shared with PB0~PB5. PB6/VRL and
PB7/VRH are used for the A/D converter reference inputs. ACS2,ACS1,ACS0 :
000/001/010/011/100/101/110/111: AN0/AN1/AN2/AN3/AN4/AN5/VRL/VRH
ADCS1
ADCS0
4
3
A/D converter clock source selection. ADCS1,ADCS0:
00: 6MHz
01: 3MHz
10: 1.5MHz
11: 0.75MHz
START
5
StarttheA/Dconversion.(0
1
0:start,0
1:resetA/DconverterandA/Ddataregister)
ADON
6
This bit is used to control the enable/disable of A/D converter circuit. If this bit is set to 1
theA/Dconverterentersoperatingmode.Otherwise,theA/Dconverterwillbeturned-off
EOCB
7
End of A/D conversion indication. (0: end of A/D conversion)
The A/D converter data register is used to store the result of A/D conversion.
ADR
Bits
Function
D7~D0
7~0
Result of A/D conversion