參數(shù)資料
型號: HT24LC04-8DIP-A
元件分類: EEPROM
英文描述: EEPROM
中文描述: EEPROM的
文件頁數(shù): 3/12頁
文件大?。?/td> 100K
代理商: HT24LC04-8DIP-A
A.C. Characteristics
Ta=0 C to 70 C
Symbol
Parameter
Remark
Standard Mode*
V
CC
=5V 10%
Unit
Min.
Max.
Min.
Max.
f
SK
Clock Frequency
100
400
kHz
t
HIGH
Clock High Time
4000
600
ns
t
LOW
Clock Low Time
4700
1200
ns
t
r
SDA and SCL Rise Time
Note
1000
300
ns
t
f
SDA and SCL Fall Time
Note
300
300
ns
t
HD:STA
START Condition Hold Time
After this period the
first clock pulse is
generated
4000
600
ns
t
SU:STA
START Condition Setup Time
Only relevant for
repeated START
condition
4000
600
ns
t
HD:DAT
Data Input Hold Time
0
0
ns
t
SU:DAT
Data Input Setup Time
200
100
ns
t
SU:STO
STOP Condition Setup Time
4000
600
ns
t
AA
Output Valid from Clock
3500
900
ns
t
BUF
Bus Free Time
Time in which the bus
must be free before a
new transmission can
start
4700
1200
ns
t
SP
Input Filter Time Constant
(SDA and SCL Pins)
Noise suppression
time
100
50
ns
t
WR
Write Cycle Time
5
5
ms
Note:
These parameters are periodically sampled but not 100% tested
* The standard mode means V
CC
=2.2V to 5.5V
For relative timing, refer to timing diagrams
HT24LC02
Rev. 1.10
3
November 5, 2002
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