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參數(shù)資料
| 型號： | HT1647(100QFP)A |
| 英文描述： | Controller Miscellaneous - Datasheet Reference |
| 中文描述： | 控制器雜項-數(shù)據(jù)表參考 |
| 文件頁數(shù)： | 8/22頁 |
| 文件大?。?/td> | 201K |
| 代理商： | HT1647(100QFP)A |
A.C. Characteristics
Ta=25 C
Symbol
Parameter
Test Conditions
Min.
Typ.
Max.
Unit
V
DD
Conditions
f
SYS1
System Clock
3V
On-chipRCoscillator
22
32
40
kHz
5V
24
32
40
kHz
f
SYS2
System Clock
3V
Crystal oscillator
32.768
kHz
5V
32.768
kHz
f
SYS3
System Clock
3V
External clock source
32
kHz
5V
32
kHz
f
LCD1
LCD Frame Frequency
3V
On-chipRCoscillator
61/117 89/170 111/213
Hz
5V
61/117 89/170 111/213
Hz
f
LCD2
LCD Frame Frequency
3V
Crystal oscillator
64
Hz
5V
64
Hz
f
LCD3
LCD Frame Frequency
3V
External clock source
64
Hz
5V
64
Hz
t
COM
LCD Common Period
n: Number of COM
n/f
LCD
sec
f
CLK1
4-Bit Data Clock (WR Pin)
3V
Duty cycle 50%
150
kHz
5V
300
kHz
f
CLK2
4-Bit Data Clock (RD Pin)
3V
Duty cycle 50%
75
kHz
5V
150
kHz
t
CS
4-Bit Interface Reset Pulse
Width
(Figure3)
CS
250
ns
t
CLK
WR, RD Input Pulse Width
(Figure1)
3V
Write mode
3.34
s
Read mode
6.67
5V
Write mode
1.67
s
Read mode
3.34
t
r
, t
f
Rise/Fall Time Serial Data
ClockWidth
(Figure1)
3V
120
ns
5V
t
su
Setup Time for DB to WR,
RDClockWidth
(Figure2)
3V
120
ns
5V
t
h
HoldTimeforDBtoWR,RD
ClockWidth
(Figure2)
3V
120
ns
5V
t
su1
Setup Time for CS to WR, RD
ClockWidth
(Figure3)
3V
100
ns
5V
t
h1
HoldTimeforCStoWR,RD
ClockWidth
(Figure3)
3V
100
ns
5V
HT1647
Rev. 1.00
8
June 1, 2001
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