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參數(shù)資料
| 型號： | HT1647(100QFP)A |
| 英文描述： | Controller Miscellaneous - Datasheet Reference |
| 中文描述： | 控制器雜項-數(shù)據(jù)表參考 |
| 文件頁數(shù)： | 15/22頁 |
| 文件大?。?/td> | 201K |
| 代理商： | HT1647(100QFP)A |
Timing Diagrams
READ mode (command ID code : 1 1 0)
HT1647
Rev. 1.00
15
June 1, 2001
Interfacing
Only six lines are required to interface with the
HT1647. The CS line is used to initialize the se-
rialinterfacecircuitandtoterminatethecommu-
nication between the host controller and the
HT1647. If the CS pin is set to 1, the data and
command issued between the host controller and
the HT1647 are first disabled and then initial-
ized. Before issuing a mode command or mode
switching,ahighlevelpulseisrequiredtoinitial-
ize the serial interface of the HT1647. The
DB0~DB3 are the 4-bit parallel data input/out-
putlines.Datatobereadorwrittenorcommands
to be written have to pass through the DB0~DB3
lines. The RD line is the READ clock input. Data
in the RAM are clocked out on the falling edge of
the RD signal, and the clocked out data will then
appearontheDB0~DB3lines.Itisrecommended
that the host controller read correct data during
the interval between the rising edge and the next
falling edge of the RD signal. The WR line is the
WRITE clock input. The data, address, and com-
mand on the DB0~DB3 lines are all clocked into
the HT1647 on the rising edge of the WR signal.
There is an optional IRQ line to be used as an in-
terface between the host controller and the
HT1647. The IRQ pin can be selected as a timer
output or a WDT overflow flag output by the S/W
setting. The host controller can perform the time
base or the WDT function by connecting with the
IRQ pin of the HT1647.
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