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參數(shù)資料
| 型號(hào)： | HSP9501JC-32 |
| 廠商： | HARRIS SEMICONDUCTOR |
| 元件分類： | 數(shù)字信號(hào)處理外設(shè) |
| 英文描述： | Programmable Data Buffer |
| 中文描述： | 10-BIT, DSP-PIPELINE REGISTER, PQCC44 |
| 文件頁(yè)數(shù)： | 6/8頁(yè) |
| 文件大小： | 49K |
| 代理商： | HSP9501JC-32 |
196
Test Load Circuit
NOTE: Includes stray and jig capacitance.
MODSEL Setup Time
t
MS
10
-
13
-
ns
-
MODSEL Hold Time
t
MH
2
-
2
-
ns
-
Clock to Data Out
T
OUT
-
16
-
22
ns
-
Output Hold from Clock
T
OH
4
-
4
-
ns
-
Rise, Fall Time
T
RF
-
6
-
6
ns
Note 4
NOTES:
2. Power supply current is proportional to operating frequency. Typical rating for I
CCOP
is 5mA/MHz.
3. Output load per test load circuit with switch open and C
L
= 40pF.
4. Controlled by design or process parameters and not directly tested. Characterized upon initial design and after major process and/or design
changes.
5. AC Testing is performed as follows: Input levels: 0V and 3.0V, timing reference levels = 1.5V, input rise and fall times driven at 1ns/V, output
load C
L
= 40pF.
AC Electrical Specifications
V
CC
= 5.0V
±
5%, T
A
= 0
o
C to +70
o
C, Commercial, (Note 5)
(Continued)
PARAMETER
SYMBOL
-32
-25
UNITS
NOTES
MIN
MAX
MIN
MAX
EQUIVALENT CIRCUIT
C
L
(NOTE)
I
OH
1.5V
I
OL
DUT
SWITCH S1 OPEN FOR I
CCSB
AND I
CCOP
S
1
±
HSP9501
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