參數(shù)資料
型號: HSP43220JC-25Z
廠商: Intersil
文件頁數(shù): 1/21頁
文件大?。?/td> 0K
描述: IC DECIMATING DGTL FILTER 84PLCC
標(biāo)準(zhǔn)包裝: 15
濾波器類型: 數(shù)字
濾波器數(shù): 4
電源電壓: 4.75 V ~ 5.25 V
安裝類型: 表面貼裝
封裝/外殼: 84-LCC(J 形引線)
供應(yīng)商設(shè)備封裝: 84-PLCC(29.21x29.21)
包裝: 管件
1
HSP43220
Decimating Digital Filter
The HSP43220 Decimating Digital Filter is a linear phase
low pass decimation filter which is optimized for filtering
narrow band signals in a broad spectrum of a signal
processing applications. The HSP43220 offers a single chip
solution to signal processing applications which have
historically required several boards of ICs. This reduction in
component count results in faster development times as well
as reduction of hardware costs.
The HSP43220 is implemented as a two stage filter
structure. As seen in the block diagram, the first stage is a
high order decimation filter (HDF) which utilizes an efficient
sample rate reduction technique to obtain decimation up to
1024 through a coarse low-pass filtering process. The HDF
provides up to 96dB aliasing rejection in the signal pass
band. The second stage consists of a finite impulse
response (FIR) decimation filter structured as a transversal
FIR filter with up to 512 symmetric taps which can implement
filters with sharp transition regions. The FIR can perform
further decimation by up to 16 if required while preserving
the 96dB aliasing attenuation obtained by the HDF. The
combined total decimation capability is 16,384.
The HSP43220 accepts 16-bit parallel data in 2’s
complement format at sampling rates up to 33MSPS. It
provides a 16-bit microprocessor compatible interface to
simplify the task of programming and three-state outputs to
allow the connection of several ICs to a common bus. The
HSP43220 also provides the capability to bypass either the
HDF or the FIR for additional flexibility.
Features
Single Chip Narrow Band Filter with up to 96dB
Attenuation
DC to 33MHz Clock Rate
16-Bit 2’s Complement Input
20-Bit Coefficients in FIR
24-Bit Extended Precision Output
Programmable Decimation up to a Maximum of 16,384
Standard 16-Bit Microprocessor Interface
Filter Design Software Available DECIMATE
Up to 512 Taps
Pb-Free Available (RoHS compliant)
Applications
Very Narrow Band Filters
Zoom Spectral Analysis
Channelized Receivers
Large Sample Rate Converter
Ordering Information
PART
NUMBER
PART
MARKING
TEMP.
RANGE
(°C)
PACKAGE
PKG.
DWG. #
HSP43220JC-25
0 to +70
84 Ld PLCC N84.1.15
HSP43220JC-25Z HSP43220JC-25Z
0 to +70
84 Ld PLCC
(Pb-free)
N84.1.15
HSP43220JC-33
0 to +70
84 Ld PLCC N84.1.15
HSP43220JC-33Z HSP43220JC-33Z
0 to +70
84 Ld PLCC
(Pb-free)
N84.1.15
NOTE: These Intersil Pb-free plastic packaged products employ special Pb-
free material sets, molding compounds/die attach materials, and 100% matte
tin plate plus anneal (e3 termination finish, which is RoHS compliant and
compatible with both SnPb and Pb-free soldering operations). Intersil Pb-free
products are MSL classified at Pb-free peak reflow temperatures that meet or
exceed the Pb-free requirements of IPC/JEDEC J STD-020.
Data Sheet
October 10, 2008
FN2486.10
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 1-888-468-3774
| Intersil (and design) is a registered trademark of Intersil Americas Inc.
Copyright Intersil Americas Inc. 2000, 2004, 2008. All Rights Reserved
DECIMATE is a trademark of Intersil Corporation.
All other trademarks mentioned are the property of their respective owners.
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