參數(shù)資料
型號(hào): HS9-82C12RH
廠商: HARRIS SEMICONDUCTOR
元件分類: 微控制器/微處理器
英文描述: Radiation Hardened 8-Bit Input/Output Port
中文描述: 8 I/O, PIA-GENERAL PURPOSE, CDFP24
文件頁(yè)數(shù): 1/8頁(yè)
文件大小: 49K
代理商: HS9-82C12RH
1
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
http://www.intersil.com or 407-727-9207
|
Copyright
Intersil Corporation 1999
Ordering Information
PART NUMBER
TEMPERATURE RANGE
SCREENING LEVEL
PACKAGE
5962R9581801QJC
-55
o
C to +125
o
C
MIL-PRF-38535 Level Q
24 Lead SBDIP
5962R9581801QXC
-55
o
C to +125
o
C
MIL-PRF-38535 Level Q
24 Lead Ceramic Flatpack
5962R9581801VJC
-55
o
C to +125
o
C
MIL-PRF-38535 Level V
24 Lead SBDIP
5962R9581801VXC
-55
o
C to +125
o
C
MIL-PRF-38535 Level V
24 Lead Ceramic Flatpack
HS1-82C12RH/Sample
+25
o
C
Sample
24 Lead SBDIP
HS9-82C12RH/Sample
+25
o
C
Sample
24 Lead Ceramic Flatpack
HS-82C12RH
Radiation Hardened
8-Bit Input/Output Port
Functional Diagram
Pin Description
PIN
DESCRIPTION
DI0-DI7
Data In
DO0-DO7
Data Out
DS1, DS2
Device Select
MD
Mode
STB
Strobe
INT
Interrupt
CLR
Clear
CONTROL
AND
DEVICE
SELECT
LOGIC
DATA
LATCH
AND
BUFFER
(8)
2
3
INT
DS2
STB
CLR
MD
DS1
SERVICE
REQUEST
F.F.
DI0-7
DO0-7
Features
Devices QML Qualified in Accordance with
MIL-PRF-38535
Detailed Electrical and Screening Requirements are
Contained in SMD# 5962-95818 and Intersil’ QM Plan
- Radiation Hardened CMOS Process
- Total Dose 1 x 10
5
RAD (Si)
- Transient Upset > 1 x 10
8
RAD (Si)/s
- Latch-Up Immune EPI-CMOS > 1 x 10
12
RAD (Si)/s
Low Power Dissipation
High Noise Immunity
Single Power Supply +5V
Low Input Load Current
8-Bit Data Register and Buffer
Asynchronous Register Clear
Service Request Flip-Flop for Interrupt Generation
Three-State Outputs
Bus-Compatible with HS-80C85RH CPU
Electrically Equivalent to Sandia SA3026
Military Temperature Range -55
o
C to +125
o
C
Description
The Intersil HS-82C12RH is a radiation hardened 8-bit input/
output port designed for use with the HS-80C85RH radiation
hardened microprocessor. It is manufactured using a self-
aligned, junction-isolated EPI-CMOS process and features
three-state output buffers and device selection and control
logic. A service request flip-flop is included for the
generation and control of interrupts to the microprocessor.
The device can be used in implement many of the peripheral
and input/output functions of a microcomputer system. The
HS-82C12RH is pinout- and function- compatible with
industry-standard 8212 devices.
March 1996
Spec Number
518063
File Number
3041.2
D
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