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參數(shù)資料
| 型號： | HPC467064EL20 |
| 廠商： | NATIONAL SEMICONDUCTOR CORP |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | High-Performance microController with a 16k UV Erasable CMOS EPROM |
| 中文描述： | UVPROM, MICROCONTROLLER, CQCC68 |
| 封裝： | WINDOWED, LDCC-68 |
| 文件頁數(shù)： | 15/34頁 |
| 文件大?。?/td> | 415K |
| 代理商： | HPC467064EL20 |
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Ports A & B
(Continued)
TL/DD/11046–22
FIGURE 14. Structure of Port B Pins B10, B11, B12 and B15 (Pins with Bus Control Roles)
Operating Modes
To offer the user a variety of I/O and expanded memory
options, the HPC167064 has four operating modes. The
various modes of operation are determined by the state of
both the EXM pin and the EA bit in the PSW register. The
state of the EXM pin determines whether on-chip EPROM
will be accessed or external memory will be accessed within
the address range of the on-chip EPROM. The on-chip
EPROM range of the HPC167064 is C000 to FFFF
(16 kbytes).
A logic ‘‘0’’ state on the EXM pin will cause the HPC device
to address on-chip EPROM when the Program Counter (PC)
contains addresses within the on-chip EPROM address
range. A logic ‘‘1’’ state on the EXM pin will cause the HPC
device to address memory that is external to the HPC when
the PC contains on-chip EPROM addresses. The function of
the EA bit is to determine the legal addressing range of the
HPC device. A logic ‘‘0’’ state in the EA bit of the PSW
register does two thingsDaddresses are limited to the on-
chip EPROM range and on-chip RAM and Register range,
and the ‘‘illegal address detection’’ feature of the WATCH-
DOG logic is engaged. A logic ‘‘1’’ in the EA bit enables
accesses to be made anywhere within the 64 kbytes ad-
dress range and the ‘‘illegal address detection’’ feature of
the WATCHDOG logic is disabled.
All HPC devices can be used with external memory. Exter-
nal memory may be any combination of RAM and EPROM.
Both 8-bit and 16-bit external data bus modes are available.
Upon entering an operating mode in which external memory
is used, Port A becomes the Address/Data bus. Four pins of
Port B become the control lines ALE, RD, WR and HBE.
The High Byte Enable pin (HBE) is used in 16-bit mode to
select high order memory bytes. The RD and WR signals
are only generated if the selected address is off-chip. The 8-
bit mode is selected by pulling HBE high at reset. If HBE is
left floating or connected to a memory device chip select at
reset, the 16-bit mode is entered. The following sections
describe the operating modes of the HPC167064.
Note:
The HPC devices use 16-bit words for stack memory. Therefore,
when using the 8-bit mode, User’s Stack must be in internal RAM.
15
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