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參數(shù)資料
| 型號： | HPC36400EV2 |
| 廠商： | National Semiconductor Corporation |
| 英文描述： | High-Performance Communications MicroController |
| 中文描述： | 高性能通信微控制器 |
| 文件頁數(shù)： | 3/30頁 |
| 文件大?。?/td> | 362K |
| 代理商： | HPC36400EV2 |
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Pin Descriptions (Continued)
POWER SUPPLIES
VCC1 VCC2
Positive Power Supply (two pins)
GND
Ground for On-Chip Logic
DGND
Ground for Output Buffers
Note
There are multiple electrically connected VCC pins on the chip GND
and DGND are electrically isolated All VCC pins and all ground pins
must be used
CLOCK PINS
CKI
The System Clock Input
CKO
The System Clock Output (Inversion of CKI)
Pins CKI and CKO are usually connected across an external
crystal
CK2
Clock Output (CKI divided by 2)
OTHER PINS
WO
This is an active low open drain output which
signals an illegal situation has been detected
by the WATCHDOG logic
ST1
Bus Cycle Status Output indicates first op-
code fetch
ST2
Bus Cycle Status Output indicates machine
states (skip and interrupt)
RESET
Active low input that forces the chip to restart
and sets the ports in a TRI-STATE mode
RDYHLD
Has two uses selected by a software bit
This pin is either a READY input to extend
the bus cycle for slower memories or a
HOLD-REQUEST input to put the bus in a
high impedance state for external DMA pur-
poses In the second case the I4 pin can be-
come the READY input
Connection Diagrams
Plastic and Leaded Chip Carriers
TLDD10422 – 18
Top View
See NS Package Number V68A
11
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相關(guān)代理商/技術(shù)參數(shù) |
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| HPC36400EV20 | 制造商:NSC 制造商全稱:National Semiconductor 功能描述:High-Performance Communications MicroController |
| HPC36400EVHG2 | 制造商:NSC 制造商全稱:National Semiconductor 功能描述:High-Performance Communications MicroController |
| HPC36400EVHG20 | 制造商:NSC 制造商全稱:National Semiconductor 功能描述:High-Performance Communications MicroController |
| HPC36400L20 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:16-Bit Microcontroller |
| HPC36400T20 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:16-Bit Microcontroller |
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