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| 型號(hào)： | HOME |
| 英文描述： | Home PHY Single-Chip 1/10Mbps Home Networking PHY? - (PDF) |
| 中文描述： | 首頁P(yáng)HY的單芯片1/10Mbps家庭網(wǎng)絡(luò)物理層？ - （PDF格式） |
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Am79C901A
57
P R E L I M I N A R Y
TBR0: 10BASE-T PHY Control Register (Register 0)
Table 41.
TBR0: 10BASE-T PHY Control Register (Register 0)
Notes:
1. R/W = Read/Write, SC = Self Clearing, R = Read only.
2. Soft Reset does not reset the PDX block. Refer to the Soft Reset section for details.
3. Bits 8 and 13 have no effect if Auto-Negotiation is enabled (Bit 12 = 1).
4. If the ISOL pin of the chip and the Isolate bit in Register 0 is 1, this bit will be set.
5.
The
“
enable loopback mode
”
bit must also be set to ensure that collision traffic is not imposed on the network.
Bits
Name
Description
Read/Write
(Note 1)
Default
Value
(hex)
15
Soft Reset (Note 2)
When write
1 = PHY software reset
0 = Normal operation
When read
1 = Reset in process
0 = Reset done
R/W, SC
0
14
Enable Loopback Mode
1 = Loopback mode enable
0 = Loopback mode disable
R/W
0
13
Speed Selection
(Note 3)
1 = 100 Mbps (not available)
0 = 10 Mbps
R
0
12
Auto-Negotiation Enable
1 = Enable Auto-Negotiation
0 = Disable Auto-Negotiation
R/W
1
11
Power Down
1 = Power down
0 = Normal operation
R/W
0
10
Isolate
(Note 4)
1 = Electrically isolates PHY from the MII/GPSI
0 = Normal operation
R/W
1
9
Restart Auto-Negotiation
1 = Restart Auto-Negotiation
0 = Normal operation
R/W, SC
0
8
Duplex Mode
(Note 3)
1 = Full-Duplex
0 = Half-Duplex
R/W
1
7
Collision Test
(Note 5)
1 = Enable COL signal test
0 = Disable COL signal test
R/W
0
6:0
Reserved
Write as 0, ignore on read
R
0
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