- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄370645 > HN29W256AH03TE (Hitachi,Ltd.) Controller for AND Flash Memory(AND型閃速存儲器控制器) PDF資料下載
參數(shù)資料
| 型號： | HN29W256AH03TE |
| 廠商： | Hitachi,Ltd. |
| 英文描述： | Controller for AND Flash Memory(AND型閃速存儲器控制器) |
| 中文描述： | 控制器及快閃記憶體（及型閃速存儲器控制器） |
| 文件頁數(shù)： | 41/73頁 |
| 文件大小： | 239K |
| 代理商： | HN29W256AH03TE |
第1頁第2頁第3頁第4頁第5頁第6頁第7頁第8頁第9頁第10頁第11頁第12頁第13頁第14頁第15頁第16頁第17頁第18頁第19頁第20頁第21頁第22頁第23頁第24頁第25頁第26頁第27頁第28頁第29頁第30頁第31頁第32頁第33頁第34頁第35頁第36頁第37頁第38頁第39頁第40頁當前第41頁第42頁第43頁第44頁第45頁第46頁第47頁第48頁第49頁第50頁第51頁第52頁第53頁第54頁第55頁第56頁第57頁第58頁第59頁第60頁第61頁第62頁第63頁第64頁第65頁第66頁第67頁第68頁第69頁第70頁第71頁第72頁第73頁
HN29W256AH03TE-1
41
Note:
FR: Feature register
SC: Sector Count register
SN: Sector Number register
CY: Cylinder register
DR: DRV bit of Drive Head register
HD: Head Number of Drive Head register
LBA: Logical Block Address Mode Supported
Y: The register contains a valid parameter for this command.
N: The register does not contain a valid parameter for this command.
12. Device control register:
This register is write only register, and it is used for controlling the card
interrupt request and issuing an ATA soft reset to the card.
bit7
bit6
bit5
bit4
bit3
bit2
bit1
bit0
×
×
×
×
1
SRST
nIEN
0
bit
Name
Function
7 to 4
×
don't care
3
1
This bit is set to "1".
2
SRST (Software ReSeT)
This bit is set to "1" in order to force the card to perform Task File
Reset operation. This does not change the Card Configuration
registers as a Hardware Reset does. The card remains in Reset
until this bit is reset to "0".
1
nIEN (Interrupt ENable)
This bit is used for enabling -IREQ. When this bit is set to "0", -IREQ
is enabled. When this bit is set to "1", -IREQ is disabled.
0
0
This bit is set to "0".
13. Drive Address register:
This register is read only register, and it is used for confirming the drive status.
This register is provides for compatibility with the AT disk drive interface. It is recommended that this
register is not mapped into the host’s I/O space because of potential conflicts on bit7.
bit7
bit6
bit5
bit4
bit3
bit2
bit1
bit0
×
nWTG
nHS3
nHS2
nHS1
nHS0
nDS1
nDS0
bit
Name
Function
7
×
This bit is unknown
6
nWTG (WriTing Gate)
This bit is unknown
5 to 2 nHS3-0 (Head Select3-0)
These bits is the negative value of Head Select bits (bit 3 to 0) in
Drive/Head register.
1
nDS1 (Idrive Select1)
This bit is unknown
0
nDS0 (Idrive Select0)
This bit is unknown
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| HN29W256H02TE | Controller for AND Flash Memory(AND型閃速存儲器控制器) |
| HN29W6411A | 64M AND type Flash Memory(64M AND型閃速存儲器) |
| HN29W6484AH03TE | Controller for AND Flash Memory(AND型閃速存儲器控制器) |
| HN29W6484DH08TE | Controller for AND Flash Memory(AND型閃速存儲器控制器) |
| HN29WB800 | 1048576-word x 8-bit / 524288-word x 16-bit CMOS Flash Memory |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| HN29W256H02TE-1 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:MEMORY CONTROLLER |
| HN29W256SH02TE-1 | 制造商:Renesas Electronics Corporation 功能描述:256M FLASH CONTROLLER - Trays |
| HN29W3221T-12 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:AND Flash EEPROM |
| HN29W3221T-15 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:AND Flash EEPROM |
| HN29W51214ST | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Flash Application Design Guidelines Others |
發(fā)布緊急采購，3分鐘左右您將得到回復。