參數(shù)資料
型號: HMS81C2020A
廠商: Electronic Theatre Controls, Inc.
英文描述: INDCTR, PWR, SMT 1.5UH, 15%, 6.9 A
中文描述: CMOS單芯片8位微控制器與A / D轉(zhuǎn)換器
文件頁數(shù): 68/107頁
文件大?。?/td> 1482K
代理商: HMS81C2020A
HMS81C2012A/2020A
64
SEP. 2004 Ver 2.00
14.1 Transmission/Receiving Timing
The serial transmission is started by setting SIOST(bit1 of
SIOM) to “1”. After one cycle of SCK, SIOST is cleared
automatically to “0”. The serial output data from 8-bit shift
register is output at falling edge of SCLK. And input data
is latched at rising edge of SCLK pin. When transmission
clock is counted 8 times, serial I/O counter is cleared as
‘0”. Transmission clock is halted in “H” state and serial I/
O interrupt(IFSIO) occurred.
Figure 14-3 SPI Timing Diagram at POL=0
Figure 14-4 SPI Timing Diagram at POL=1
D1
D2
D3
D4
D6
D7
D0
D5
D1
D2
D3
D4
D6
D7
D0
D5
SIOST
SCLK [R53]
(POL=0)
SOUT [R55]
SIN [R54]
(IOSW=0)
SPIIF
(SPI Int. Req)
D1
D2
D3
D4
D6
D7
D0
D5
IOSWIN [R55]
(IOSW=1)
SIOSF
(SPI Status)
D1
D2
D3
D4
D6
D7
D0
D5
D1
D2
D3
D4
D6
D7
D0
D5
SIOST
SCLK [R53]
(POL=1)
SOUT [R55]
SIN [R54]
(IOSW=0)
SPIIF
(SPI Int. Req)
D1
D2
D3
D4
D6
D7
D0
D5
IOSWIN [R55]
(IOSW=1)
SIOSF
(SPI Status)
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