參數(shù)資料
型號: HMS81C2020A
廠商: Electronic Theatre Controls, Inc.
英文描述: INDCTR, PWR, SMT 1.5UH, 15%, 6.9 A
中文描述: CMOS單芯片8位微控制器與A / D轉(zhuǎn)換器
文件頁數(shù): 53/107頁
文件大?。?/td> 1482K
代理商: HMS81C2020A
HMS81C2012A/2020A
SEP. 2004 Ver 2.00
49
8-bit Timer Mode
In the timer mode, the internal clock is used for counting
up. Thus, you can think of it as counting internal clock in-
put. The contents of TDR
n
are compared with the contents
of up-counter, T
n
. If match is found, a timer 1 interrupt
(T1IF) is generated and the up-counter is cleared to 0.
Counting up is resumed after the up-counter is cleared.
As the value of TDR
n
is changeable by software, time in-
terval is set as you want
Figure 12-3 Timer Mode Timing Chart
Figure 12-4 Timer Count Example
0
n-2
2
0
n
3
n-1
n
Source clock
Up-counter
TDR1
T1IF interrupt
Start count
1
2
3
1
4
Match
Detect
Counter
Clear
~
~
~
~
~
~
Timer 1 (T1IF)
Interrupt
TDR1
TIME
Occur interrupt
Occur interrupt
Occur interrupt
Interrupt period
= 8
μ
s x 125
upcoun
~
~
0
1
2
3
4
5
6
7A
7D
7C
Count Pulse
Period
7B
MATCH
(TDR0 = T0)
Example:
Make 2ms
interrupt using by Timer0 at 4MHz
LDM
LDM
SET1
EI
TM0,#0FH
TDR0,#125
T0E
; divide by 32
; 8us x 125= 1ms
; Enable Timer 0 Interrupt
; Enable Master Interrupt
When
TDR0 = 125
D
= 7D
H
f
XIN
= 4 MHz
INTERRUPT PERIOD =
4
×
10
6
Hz
1
×
32
×
125 = 1 ms
TM0 = 0000 1111
B
(8-bit Timer mode, Prescaler divide ratio = 32)
8
μ
s
7D
0
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