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參數(shù)資料
| 型號： | HMS38112 |
| 廠商： | Electronic Theatre Controls, Inc. |
| 英文描述： | 4-BIT SINGLE CHIP MICROCOMPUTERS |
| 中文描述： | 4位單片機微機 |
| 文件頁數(shù)： | 30/73頁 |
| 文件大?。?/td> | 505K |
| 代理商： | HMS38112 |
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3-2
Address Register
The following registers are used to address the ROM.
Page address register (PA) :
Holds ROM's page number (0~Fh) to be addressed.
Page buffer register (PB) :
Value of PB is loaded by an LPBI command when newly addressing a page.
Then it is shifted into the PA when rightly executing a branch instruction (BR)
and a subroutine call (CAL).
Program counter (PC) :
Available for addressing word on each page.
Stack register (SR) :
Stores returned-word address in the subroutine call mode.
(1) Page address register and page buffer register :
Address one of pages #0 to #15 in the EPROM by the 4-bit binary counter.
Unlike the program counter, the page address register is usually unchanged so
that the program will repeat on the same page unless a page changing command
is issued. To change the page address, take two steps such as (1) writing in the
page buffer what page to jump (execution of LPBI) and (2) execution of BR or CAL,
because instruction code is of eight bits so that page and word can not be specified
at the same time.
In case a return instruction (RTN) is executed within the subroutine that has been
called in the other page, the page address will be changed at the same time.
(2) Program counter :
This 6-bit binary counter increments for each fetch to address a word in the
currently addressed page having an instruction to be next executed.
For easier programming, at turning on the power, the program counter is
reset to the zero location. The PA is also set to "0". Then the program
counter specifies the next address in random sequence.
When BR, CAL or RTN instructions are decoded, the switches on each step
are turned off not to update the address. Then, for BR or CAL, address
data are taken in from the instruction operands (a
0
to a
5
), or for RTN, and
address is fetched from stack register No. 1.
(3) Stack register :
This stack register provides two stages each for the program counter (6bits)
and the page address register (4bits) so that subroutine nesting can be
made on two levels.
Chapter 3. Architecture
相關PDF資料 |
PDF描述 |
|---|---|
| HMS39112 | 4-BIT SINGLE CHIP MICROCOMPUTERS |
| HMS39C70512 | [ARM7 Core Base Solution Product] |
| HMS39C7092 | MMBTA42, 300V, 0.5A, 300MW, SOT-23 |
| HMS77C2000 | [General Purpose(2) : ADC/ LED/ SCI/ PWM] |
| HMS77C2001 | [General Purpose(2) : ADC/ LED/ SCI/ PWM] |
相關代理商/技術參數(shù) |
參數(shù)描述 |
|---|---|
| HMS38T2564 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:32bit CPU, 64Kbyte EEPROM, 256Kbyte ROM, 8Kbyte RAM |
| HMS39112 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:4-BIT SINGLE CHIP MICROCOMPUTERS |
| HMS39C70512 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:[ARM7 Core Base Solution Product] |
| HMS39C7092 | 制造商:HYNIX 制造商全稱:Hynix Semiconductor 功能描述:Embedded Flash MCU |
| HMS3S800 | 制造商:Siemens 功能描述: |
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