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參數(shù)資料
| 型號(hào)： | HMMC-5027 |
| 廠商： | AGILENT TECHNOLOGIES INC |
| 元件分類： | 放大器 |
| 英文描述： | 2000 MHz - 26500 MHz RF/MICROWAVE WIDE BAND LOW POWER AMPLIFIER |
| 封裝： | 0.1173 X 0.0303 INCH, 0.0056 INCH HEIGHT, DIE |
| 文件頁(yè)數(shù)： | 3/7頁(yè) |
| 文件大?。?/td> | 542K |
| 代理商： | HMMC-5027 |
3
Biasing and Operation
These ampliers are biased with a
single positive drain supply (VDD) and a
single negative gate supply (VG1). The
recommended bias conditions for the
HMMC-5027 are VDD = 8.0 V, IDD =
250 mA or IDSS, whichever is less. To
achieve this drain current level, VG1
is typically biased between 0 V and -0.6
V. No other bias supplies or connec-
tions to the device are required for 2
to 26.5 GHz operation. The gate voltage
(VG1) MUST be applied prior to the drain
voltage (VDD) during power up and
removed after the drain voltage during
power down. See Figure 3 for assembly
information.
The HMMC-5027 is a DC coupled
amplier. External coupling capacitors
are needed on RFIN and RFOUT ports.
The drain bias pad is connected to RF
and must be decoupled to the lowest
operating frequency.
The auxiliary gate and drain
contacts are provided when per-for-
mance below 1 GHz is required. Connect
external capacitors to ground to main-
tain input and output VSWR at low fre-
quencies (see Additional References).
Do not apply bias to these pads.
The second gate (VG2) can be used to
obtain 30 dB (typical)
dynamic gain control. For normal
operation, no external bias is
required on this contact and its self-
bias potential is between
+1.5 and +2.5 volts. Applying an
external bias between its open circuit
potential and -2.5 volts will adjust
the gain while main-taining a good
input/output
port match.
Assembly Techniques
GaAs MMICs are ESD sensitive.
ESD preventive measures must be
employed in all aspects of storage,
handling, and assembly.
MMIC ESD precautions, hand-ling
considerations, die attach and bonding
methods are critical factors in suc-
cessful GaAs MMIC performance and
reliability.
Agilent application note #54, “GaAs
MMIC ESD, Die Attach
and Bonding Guidelines” provides
basic information on
these subjects.
Additional References:
AN #34, “HMMC-5021/22/26/27
TWA Environmental Data,”
AN #56, “GaAs MMIC TWA
Users Guide.”
Second Gate
Bias (VG2)
Drain Bias
(VDD)
Single Stage Shown
50
7.5
248
17 K
50
15 K
30 K
First Gate
Bias (VG1)
Aux. Gate
5.5
50
Notes:
FET gate periphery in microns.
All resistors in ohms ().
(or in K-ohms, where indicated).
Seven Identical Stages
RF Output
Aux. Drain
RF Input
Figure 1. Schematic
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| HMMC-5032 | 制造商:Agilent Technologies 功能描述:RF AMP MOD SGL PWR AMP 32GHZ 5V - Gel-pak, waffle pack, wafer, diced wafer on film |
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| HMMC-5040 | 制造商:Agilent Technologies 功能描述:RF AMP CHIP SGL GP 40GHZ 5V - Gel-pak, waffle pack, wafer, diced wafer on film |
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