參數(shù)資料
型號(hào)： HM51W16165J-7
廠商： Hitachi,Ltd.
英文描述： 16 M EDO DRAM (1-Mword 16-bit) 4 k Refresh/1 k Refresh
中文描述： 16米EDO公司的DRAM（1 - Mword 16位）4畝刷新/ 1畝刷新
文件頁(yè)數(shù)： 8/36頁(yè)
文件大?。?/td> 461K
代理商： HM51W16165J-7
HM51W16165 Series, HM51W18165 Series
8
DC Characteristics
(Ta = 0 to +70
°
C, V
CC
= 3.3 V
±
0.3 V, V
SS
= 0 V) (HM51W16165 Series)
HM51W16165
-5
-6
-7
Parameter
Symbol
Min Max Min Max Min Max Unit
Test conditions
Operating current*
1,
*
2
I
CC1
I
CC2
—
110 —
100 —
90
mA
t
RC
= min
TTL interface
RAS
,
UCAS
,
LCAS
= V
IH
Dout = High-Z
Standby current
—
2
—
2
—
2
mA
—
1
—
1
—
1
mA
CMOS interface
RAS
,
UCAS
,
LCAS
≥
V
– 0.2 V
Dout = High-Z
Standby current
(L-version)
I
CC2
—
150 —
150 —
150
μ
A
CMOS interface
RAS
,
UCAS
,
LCAS
≥
V
– 0.2 V
Dout = High-Z
RAS
-only refresh current*
2
I
CC3
I
CC5
—
110 —
100 —
90
mA
t
RC
= min
RAS
= V
UCAS
,
LCAS
= V
IL
Dout = enable
Standby current*
1
—
5
—
5
—
5
mA
CAS
-before-
RAS
refresh
current
I
CC6
—
110 —
100 —
90
mA
t
RC
= min
EDO page mode current*
1,
*
3
I
CC7
I
CC10
—
105 —
95
—
85
mA
t
HPC
= min
CMOS interface
Dout = High-Z
CBR refresh: t
RC
= 31.3
μ
s
t
RAS
≤
0.3
μ
s
CMOS interface
RAS
,
UCAS
,
LCAS
≤
0.2 V
Dout = High-Z
Battery backup current*
4
(Standby with CBR refresh)
(L-version)
—
400 —
400 —
400
μ
A
Self refresh mode current
(L-version)
I
CC11
—
250 —
250 —
250
μ
A
Input leakage current
I
LI
I
LO
–10 10
–10 10
–10 10
μ
A
μ
A
0 V
≤
Vin
≤
4.6 V
0 V
≤
Vout
≤
4.6 V
Dout = disable
Output leakage current
–10 10
–10 10
–10 10
Output high voltage
V
OH
V
OL
2.4
V
CC
0.4
2.4
V
CC
0.4
2.4
V
CC
0.4
V
High Iout = –2 mA
Output low voltage
Notes: 1. I
depends on output load condition when the device is selected. I
CC
max is specified at the
output open condition.
2. Address can be changed once or less while
RAS
= V
IL
.
3. Address can be changed once or less while
UCAS
and
LCAS
= V
IH
.
4. V
IH
≥
V
CC
– 0.2 V, 0 V
≤
V
IL
≤
0.2 V.
0
0
0
V
Low Iout = 2 mA
This Material Copyrighted By Its Respective Manufacturer
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