參數(shù)資料
型號(hào)： HI5760BIB
廠商： INTERSIL CORP
元件分類： DAC
英文描述： 10-Bit, 125/60MSPS, High Speed D/A Converter
中文描述： PARALLEL, WORD INPUT LOADING, 0.035 us SETTLING TIME, 10-BIT DAC, PDSO28
封裝： PLASTIC, MS-013-AE, SOIC-28
文件頁(yè)數(shù)： 5/18頁(yè)
文件大?。?/td> 172K
代理商： HI5760BIB
5
DIGITAL INPUTS
D9-D0, CLK
Input Logic High Voltage with
5V Supply, V
IH
Input Logic High Voltage with
3V Supply, V
IH
Input Logic Low Voltage with
5V Supply, V
IL
Input Logic Low Voltage with
3V Supply, V
IL
Input Logic Current, I
IH
Input Logic Current, I
IL
Digital Input Capacitance, C
IN
TIMING CHARACTERISTICS
(Note 3)
3.5
5
-
V
(Note 3)
2.1
3
-
V
(Note 3)
-
0
1.3
V
(Note 3)
-
0
0.9
V
-10
-
+10
μ
A
-10
-
+10
μ
A
-
5
-
pF
Data Setup Time, t
SU
Data Hold Time, t
HLD
Propagation Delay Time, t
PD
CLK Pulse Width, t
PW1
, t
PW2
POWER SUPPLY CHARACTERISTICS
See Figure 41 (Note 3)
3
-
-
ns
See Figure 41 (Note 3)
3
-
-
ns
See Figure 41
-
1
-
ns
See Figure 41 (Note 3)
4
-
-
ns
AV
DD
Power Supply
DV
DD
Power Supply
Analog Supply Current (I
AVDD
)
(Note 8)
2.7
5.0
5.5
V
(Note 8)
2.7
5.0
5.5
V
(5V or 3V, IOUTFS = 20mA)
-
23
30
mA
(5V or 3V, IOUTFS = 2mA)
-
4
-
mA
Digital Supply Current (I
DVDD
)
(5V, IOUTFS = Don’t Care) (Note 5)
-
3
5
mA
(3V, IOUTFS = Don’t Care) (Note 5)
-
1.5
-
mA
Supply Current (I
AVDD
) Sleep Mode
Power Dissipation
(5V or 3V, IOUTFS = Don’t Care)
-
1.6
3
mA
(5V, IOUTFS = 20mA) (Note 6)
-
165
-
mW
(5V, IOUTFS = 2mA) (Note 6)
-
70
-
mW
(5V, IOUTFS = 20mA) (Note 9)
-
150
-
mW
(3.3V, IOUTFS = 20mA) (Note 9)
-
75
-
mW
(3V, IOUTFS = 20mA) (Note 6)
-
85
-
mW
(3V, IOUTFS = 20mA) (Note 9)
-
67
-
mW
(3V, IOUTFS = 2mA) (Note 6)
-
27
-
mW
Power Supply Rejection
Single Supply (Note 7)
-0.2
-
+0.2
% FSR/V
NOTES:
2. Gain Error measured as the error in the ratio between the full scale output current and the current through R
SET
(typically 625
μ
A). Ideally the
ratio should be 31.969.
3. Parameter guaranteed by design or characterization and not production tested.
4. Spectral measurements made with differential coupled transformer.
5. Measured with the clock at 50MSPS and the output frequency at 1MHz.
6. Measured with the clock at 100MSPS and the output frequency at 40MHz.
7. See ‘Definition of Specifications’.
8. It is recommended that the output current be reduced to 12mA or less to maintain optimum performance for operation below 3V. DV
DD
and
AV
DD
do not have to be equal.
9. Measured with the clock at 60MSPS and the output frequency at 10MHz.
Electrical Specifications
AV
DD
= DV
DD
= +5V, V
REF
= Internal 1.2V, IOUTFS = 20mA, T
A
= 25
o
C for All Typical Values
(Continued)
PARAMETER
TEST CONDITIONS
HI5760
T
A
= -40
o
C TO 85
o
C
MIN
TYP
UNITS
MAX
HI5760
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