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參數(shù)資料
| 型號(hào)： | HI5728 |
| 廠商： | Intersil Corporation |
| 英文描述： | 10-Bit, 125/60MSPS, Dual High Speed CMOS D/A Converter |
| 中文描述： | 10位，125/60MSPS，雙路高速CMOS D / A轉(zhuǎn)換 |
| 文件頁數(shù)： | 7/17頁 |
| 文件大?。?/td> | 207K |
| 代理商： | HI5728 |
7
Input Logic High Voltage with
3V Supply, V
IH
Input Logic Low Voltage with
5V Supply, V
IL
Input Logic Low Voltage with
3V Supply, V
IL
Input Logic Current, I
IH
Input Logic Current, I
IL
Digital Input Capacitance, C
IN
TIMING CHARACTERISTICS
(Per Channel)
(Note 3)s
2.1
3
-
V
(Note 3)
-
0
1.3
V
(Note 3)
-
0
0.9
V
-10
-
+10
μ
A
μ
A
-10
-
+10
-
5
-
pF
Data Setup Time, t
SU
Data Hold Time, t
HLD
Propagation Delay Time, t
PD
CLK Pulse Width, t
PW1
, t
PW2
POWER SUPPLY CHARACTERISTICS
See Figure 41 (Note 3)
3
-
-
ns
See Figure 41 (Note 3)
3
-
-
ns
See Figure 41
-
1
-
ns
See Figure 41 (Note 3)
4
-
-
ns
AVDD Power Supply
(Notes 8, 9)
2.7
5.0
5.5
V
DVDD Power Supply
(Notes 8, 9)
2.7
5.0
5.5
V
Analog Supply Current (I
AVDD
)
(5V or 3V, IOUTFS = 20mA)
-
46
60
mA
(5V or 3V, IOUTFS = 2mA)
-
8
-
mA
Digital Supply Current (I
DVDD
)
(5V, IOUTFS = Don’t Care) (Note 5)
-
6
10
mA
(3V, IOUTFS = Don’t Care) (Note 5)
-
3
-
mA
Supply Current (I
AVDD
) Sleep Mode
Power Dissipation
(5V or 3V, IOUTFS = Don’t Care)
-
3.2
6
mA
(5V, IOUTFS = 20mA) (Note 6)
-
330
-
mW
(5V, IOUTFS = 2mA) (Note 6)
-
140
-
mW
(3V, IOUTFS = 20mA) (Note 6)
-
170
-
mW
(3V, IOUTFS = 2mA) (Note 6)
-
54
-
mW
(5V, IOUTFS = 20mA) (Note 10)
-
300
-
mW
(3.3V, IOUTFS = 20mA) (Note 10)
-
150
-
mW
(3V, IOUTFS = 20mA) (Note 10)
-
135
-
mW
Power Supply Rejection
Single Supply (Note 7)
-0.2
-
+0.2
%
FSR/V
NOTES:
2. Gain Error measured as the error in the ratio between the full scale output current and the current through R
SET
(typically 625
μ
A). Ideally the
ratio should be 32.
3. Parameter guaranteed by design or characterization and not production tested.
4. Spectral measurements made with differential coupled transformer and 100% amplitude.
5. Measured with the clock at 50MSPS and the output frequency at 1MHz, both channels.
6. Measured with the clock at 100MSPS and the output frequency at 40MHz, both channels.
7. See ‘Definition of Specifications’.
8. For operation below 3V, it is recommended that the output current be reduced to 12mA or less to maintain optimum performance. DV
DD
and
AV
DD
do not have to be equal.
9. For operation above 125MHz, it is recommended that the power supply be 3.3V or greater. The part is functional with the clock above 125MSPS
and the power supply below 3.3V, but performance is degraded.
10. Measured with the clock at 60MSPS and the output frequency at 10MHz, both channels.
Electrical Specifications
AV
DD
= DV
DD
=
+
5V, V
REF
= Internal 1.2V, IOUTFS = 20mA, T
A
= 25
o
C for All Typical Values. Data given is
per channel except for ‘Power Supply Characteristics.’
(Continued)
PARAMETER
TEST CONDITIONS
HI5728IN
T
A
= -40
o
C TO 85
o
C
MIN
TYP
UNITS
MAX
HI5728
相關(guān)PDF資料 |
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|---|---|
| HI5728IN | 10-Bit, 125/60MSPS, Dual High Speed CMOS D/A Converter |
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| HI5731BIB | 12-Bit, 100 MSPS, High Speed D/A Converter |
| HI5731 | 12-Bit, 100 MSPS, High Speed D/A Converter |
| HI5731-EVS | 12-Bit, 100 MSPS, High Speed D/A Converter |
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