參數資料
型號： HI5728
廠商： Intersil Corporation
英文描述： 10-Bit, 125/60MSPS, Dual High Speed CMOS D/A Converter
中文描述： 10位，125/60MSPS，雙路高速CMOS D / A轉換
文件頁數： 5/17頁
文件大小： 207K
代理商： HI5728
5
Absolute Maximum Ratings
Thermal Information
Digital Supply Voltage DV
DD
to DCOM . . . . . . . . . . . . . . . . . +5.5V
Analog Supply Voltage AV
DD
to ACOM. . . . . . . . . . . . . . . . . +5.5V
Grounds, ACOM TO DCOM . . . . . . . . . . . . . . . . . . . -0.3V to +0.3V
Digital Input Voltages (D9-D0, CLK, SLEEP). . . . . . . . .DV
DD
+0.3V
Internal Reference Output Current. . . . . . . . . . . . . . . . . . . . .
±
50
μ
A
Reference Input Voltage Range. . . . . . . . . . . . . . . . . . AV
DD
+0.3V
Analog Output Current (I
OUT
) . . . . . . . . . . . . . . . . . . . . . . . . . 24mA
Operating Conditions
Temperature Range. . . . . . . . . . . . . . . . . . . . . . . . . . -40
o
C to 85
o
C
Thermal Resistance (Typical, Note 1)
TQFP Package. . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Maximum Power Dissipation
TQFP Package. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .930mW
Maximum Junction Temperature . . . . . . . . . . . . . . . . . . . . . . .150
o
C
Maximum Storage Temperature Range. . . . . . . . . . -65
o
C to 150
o
C
Maximum Lead Temperature (Soldering 10s) . . . . . . . . . . . . .300
o
C
θ
JA
(
o
C/W)
75
CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation of the
device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
NOTE:
1.
θ
JA
is measured with the component mounted on an evaluation PC board in free air.
Electrical Specifications
AV
DD
= DV
DD
=
+
5V, V
REF
= Internal 1.2V, IOUTFS = 20mA, T
A
= 25
o
C for All Typical Values. Data given is
per channel except for ‘Power Supply Characteristics.’
PARAMETER
TEST CONDITIONS
HI5728IN
T
A
= -40
o
C TO 85
o
C
MIN
TYP
UNITS
MAX
SYSTEM PERFORMANCE
(Per Channel)
Resolution
10
-
-
Bits
Integral Linearity Error, INL
“Best Fit” Straight Line (Note 7)
-1
±
0.5
±
0.25
+1
LSB
Differential Linearity Error, DNL
(Note 7)
-0.5
+0.5
LSB
Offset Error, I
OS
Offset Drift Coefficient
(Note 7)
-0.025
+0.025
% FSR
(Note 7)
-
0.1
-
ppm
FSR/
o
C
Full Scale Gain Error, FSE
With External Reference (Notes 2, 7)
-10
±
2
±
1
±
50
+10
% FSR
With Internal Reference (Notes 2, 7)
-10
+10
% FSR
Full Scale Gain Drift
With External Reference (Note 7)
-
-
ppm
FSR/
o
C
With Internal Reference (Note 7)
-
±
100
-
ppm
FSR/
o
C
Gain Matching Between Channels
-0.5
0.1
0.5
dB
I/Q Channel Isolation
F
OUT
= 10MHz
(Note 3)
-
80
-
dB
Output Voltage Compliance Range
-0.3
-
1.25
V
Full Scale Output Current, I
FS
DYNAMIC CHARACTERISTICS
(Per Channel)
2
-
20
mA
Maximum Clock Rate, f
CLK
Output Settling Time, (t
SETT
)
(Note 3)
125
-
-
MHz
0.1% (
±
1 LSB, equivalent to 9 Bits) (Note 7)
0.05% (
±
1/2 LSB, equivalent to 10 Bits) (Note 7)
R
L
= 25
(Note 7)
Full Scale Step
-
20
-
ns
-
35
-
ns
Singlet Glitch Area (Peak Glitch)
-
35
-
pVs
Output Rise Time
-
1.5
-
ns
Output Fall Time
Full Scale Step
-
1.5
-
ns
Output Capacitance
-
10
-
pF
Output Noise
IOUTFS = 20mA
-
50
-
pA/
√
Hz
pA/
√
Hz
IOUTFS = 2mA
-
30
-
HI5728
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