參數(shù)資料
型號: HI5628IN
廠商: HARRIS SEMICONDUCTOR
元件分類: DAC
英文描述: Power Resistor; Series:200; Resistance:1ohm; Resistance Tolerance:+/- 5%; Power Rating:8W; Resistor Element Material:Ceramic; Temperature Coefficient:+/-400 ppm; Leaded Process Compatible:Yes; Packaging:Bulk RoHS Compliant: Yes
中文描述: DUAL, PARALLEL, 8 BITS INPUT LOADING, 0.015 us SETTLING TIME, 8-BIT DAC, PQFP48
文件頁數(shù): 7/10頁
文件大?。?/td> 93K
代理商: HI5628IN
7
Definition of Specifications
Integral Linearity Error, INL
, is the measure of the worst
case point that deviates from a best fit straight line of data
values along the transfer curve.
Differential Linearity Error, DNL,
is the measure of the
step size output deviation from code to code. Ideally the step
size should be 1 LSB. A DNL specification of 1 LSB or less
guarantees monotonicity.
Output Settling Time,
is the time required for the output
voltage to settle to within a specified error band measured
from the beginning of the output transition. The
measurement was done by switching from code 0 to 64, or
quarter scale. Termination impedance was 25
due to the
Timing Diagrams
FIGURE 1. OUTPUT SETTLING TIME DIAGRAM
FIGURE 2. PEAK GLITCH AREA (SINGLET) MEASUREMENT
METHOD
FIGURE 3. PROPAGATION DELAY, SETUP TIME, HOLD TIME AND MINIMUM PULSE WIDTH DIAGRAM
CLK
D7-D0
I
OUT
50%
t
SETT
1
/
2
LSB ERROR BAND
t
PD
V
t(ps)
HEIGHT (H)
WIDTH (W)
GLITCH AREA =
1
/
2
(H x W)
CLK
D7-D0
I
OUT
50%
t
PW1
t
PW2
t
SU
t
HLD
t
SU
t
SU
t
PD
t
PD
t
PD
t
HLD
t
HLD
t
SETT
t
SETT
t
SETT
HI5628
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