參數(shù)資料
型號(hào)： HI1106JCP
廠商： INTERSIL CORP
元件分類： DAC
英文描述： RELAY SPDT 16A 24VDC PC MT
中文描述： PARALLEL, 8 BITS INPUT LOADING, 8-BIT DAC, PDIP24
封裝： PLASTIC, DIP-24
文件頁(yè)數(shù)： 4/14頁(yè)
文件大?。?/td> 691K
代理商： HI1106JCP
10-4
Absolute Maximum Ratings
T
A
= 25
o
C
Supply Voltage
V
CC
- DGND
1
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .0V to 6V
V
EE
- AGND1, AGND2 . . . . . . . . . . . . . . . . . . . . . . . . . . -6V to 0V
DGND2 - DGND1 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .0V to 6V
Digital Input Voltage
V
I
. . . . . . . . . . . . . . . . . . . . . . . . . . . DGND1 - 0.3V to V
CC
+ 0.3V
V
CLK
. . . . . . . . . . . . . . . . . . . . . . . . DGND1 - 0.3V to V
CC
+ 0.3V
Input Voltage (V
SET
Pin), V
SET
. . . . . . . . V
EE
- 0.3V to V
EE
+ 2.7V
Output Current (V
REF
Pin), l
REF
. . . . . . . . . . . . . . . . . -5mA to 0mA
Recommended Operating Conditions
SINGLE POWER SUPPLY
Supply Voltage
V
CC
, DGND2, AGND1, AGND2 . . . . . . . . 4.75V
DGND2 - AGND1, DGND2 - AGND2 . . . . -0.2V
AGND1 - AGND2 . . . . . . . . . . . . . . . . . . . -0.1V
Digital Input Voltage
H Level, V
IH
, V
CLKH
. . . . . . . . . . . . . . . . . 2.0V
L Level, V
IL
, V
CLKL
. . . . . . . . . . . . . . . . . .DGND1
V
SET
Input Voltage, V
SET
. . . . . . . . . . . . . . 0.70V
V
REF
Pin Current, I
REF
. . . . . . . . . . . . . . . .-3.0mA
Clock Pulse Width (Note 1)
t
PW1
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10ns
t
PW0
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10ns
Temperature Range, T
OPR
. . . . . . . . . . . . . . . . . . . . -20
o
C to 75
o
C
CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation
of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
Thermal Information
Thermal Resistance (Typical, Note 2)
PDIP Package . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
SOIC Package. . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Maximum Power Dissipation, P
D
. . . . . . . . . . . . . . . . . . . . . . 1.27W
Maximum Junction Temperature (Plastic Package) . . . . . . . . 150
o
C
Maximum Storage Temperature Range, T
STG
. . . . -55
o
C to 150
o
C
Maximum Lead Temperature (Soldering 10s). . . . . . . . . . . . . 300
o
C
(SOIC - Lead Tips Only)
θ
JA
(
o
C/W)
90
90
MIN
TYP
MAX
5V
0V
0V
5.25V
0.2V
0.1V
-
-
V
CC
1V
1V
0.84V
-
-0.4mA
-
-
-
-
DUAL POWER SUPPLY
Supply Voltage
V
CC
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4.75V
V
EE
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . -5.5V
DGND2 - AGND1, DGND2 - AGND2 . . . -0.2V
AGND1 - AGND2. . . . . . . . . . . . . . . . . . . -0.1V
Digital Input Voltage
H Level, V
IH
, V
CLKH
. . . . . . . . . . . . . . . . 2.0V
L Level, V
IL
, V
CLKL
. . . . . . . . . . . . . . . . . DGND1
V
SET
Input Voltage, V
SET
. . . . . . . . . . . . . . -4.30V -4.16V
V
REF
Pin Current, I
REF
. . . . . . . . . . . . . . . . -3mA
Clock Pulse Width
t
PW1
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10ns
t
PW0
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10ns
MIN
TYP
MAX
5V
5V
0V
0V
5.25V
-4.75V
-0.2V
0.1V
-
-
V
CC
1V
-4.00V
-0.4mA
-
-
-
-
-
NOTES:
1. See Figure 6 in the Timing Diagram.
2.
θ
JA
is measured with the component mounted on an evaluation PC board in free air.
Electrical Specifications
T
A
= 25
o
C, V
CC
= DGND2 = AGND1 = AGND2 = 5V, DGND1 = V
EE
= 0V, V
SET
= 0.84V
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNIT
SINGLE POWER SUPPLY
Resolution, n
-
8
-
Bit
Maximum Conversion Speed, f
MAX
Linearity Error, EL
R
L
> 10k
, C
L
< 20pF
R
L
> 10k
35
-
-
MHz
-0.5
-
0.5
LSB
Differential Linearity Error, ED
-0.5
-
0.5
LSB
Full Scale Output Voltage, V
FS
Offset Voltage (Note 2), V
OS
Output Resistance, R
O
Power Supply Current, I
CC
Digital Input Current
H Level, I
IH
L Level, I
IL
V
SET
Input Current, I
SET
Internal Reference Output Voltage, V
REF
Accuracy Output Voltage Range, V
OC
Set-Up Time, t
S
Hold Time, t
H
Propagation Delay Time, t
PD
Glitch Energy, GE
R
L
> 10k
R
L
> 10k
0.9
1.0
1.1
V
0
4
10
mV
290
350
410
R
L
> 10k
, I
REF
= -400
μ
A
32
40
48
mA
0
-
5
μ
A
-400
-
0
μ
A
-3
-
0
μ
A
I
REF
= -400
μ
A
R
L
> 10k
1.17
1.25
1.33
V
0.5
1.0
1.50
V
10
-
-
ns
2
-
-
ns
R
L
> 10k
R
L
> 10k
,
f
CLK
= 1MHz, Digital Lamp Output
-
11
-
ns
-
30
-
pV/s
NOTE:
3. V
OS
= AGND2 - V255 (V255 is the output voltage when full input is at high level).
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