參數(shù)資料
型號(hào)： HFBR-5103T
英文描述： 1300 nm 2000 m，F(xiàn)DDI, 100 Mbps ATM, and Fast Ethernet Transceivers in Low Cost 1x9 Package Style(1300 nm 2000 m，F(xiàn)DDI, 100 Mbps ATM, 快速以太網(wǎng)收發(fā)器（低價(jià)格 1x9 封裝類型）)
中文描述： 1300納米2000米，光纖分布式數(shù)據(jù)介面，100 Mbps的自動(dòng)取款機(jī)，并在低成本1x9封裝形式快速以太網(wǎng)收發(fā)器（1300納米2000米，光纖分布式數(shù)據(jù)介面，100 Mbps的自動(dòng)取款機(jī)，快速以太網(wǎng)收發(fā)器（低價(jià)格1x9封裝類型））
文件頁(yè)數(shù)： 8/24頁(yè)
文件大小： 351K
代理商： HFBR-5103T
8
Board Layout - Hole Pattern
The Agilent transceiver complies
with the circuit board “Common
Transceiver Footprint” hole
pattern defined in the original
multisource announcement which
defined the 1x9 package style.
This drawing is reproduced in
Figure 8 with the addition of
ANSI Y14.5M compliant
dimensioning to be used as a
guide in the mechanical layout of
your circuit board.
Board Layout - Art Work
The Applications Engineering
group has developed Gerber file
artwork for a multilayer printed
circuit board layout incorporating
the recommendations above.
Contact your local Agilent sales
representative for details.
Board Layout - Mechanical
For applications providing a
choice of either a duplex SC or a
duplex ST connector interface,
while utilizing the same pinout on
the printed circuit board, the ST
port needs to protrude from the
chassis panel a minimum of
9.53 mm for sufficient clearance
to install the ST connector.
Please refer to Figure 8a for a
mechanical layout detailing the
recommended location of the
duplex SC and duplex ST trans-
ceiver packages in relation to the
chassis panel.
Regulatory Compliance
These transceiver products are
intended to enable commercial
system designers to develop
equipment that complies with the
Figure 8. Recommended Board Layout Hole Pattern
various international regulations
governing certification of
Information Technology
Equipment. See the Regulatory
Compliance Table for details.
Additional information is
available from your Agilent sales
representative.
Electrostatic Discharge (ESD)
There are two design cases in
which immunity to ESD damage
is important.
The first case is during handling
of the transceiver prior to mount-
ing it on the circuit board. It is
important to use normal ESD
handling precautions for ESD
sensitive devices. These
precautions include using
grounded wrist straps, work
benches, and floor mats in ESD
controlled areas.
(8X).100
20.32
.800
20.32
.800
1.9 ± 0.1
.075 ± .004
(2X)
0.000
M A
0.8 ± 0.1
.032 ± .004
(9X)
0.000
M A
–A–
TOP VIEW
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HFBR-5103TE 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Telecomm/Datacomm
HFBR-5103TF 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Telecomm/Datacomm
HFBR-5103TJ 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Telecomm/Datacomm
HFBR-5103TP 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Telecomm/Datacomm
HFBR-5104 制造商:HP 制造商全稱:Agilent(Hewlett-Packard) 功能描述:FDDI, 100 Mbps ATM, and Fast Ethernet Transceivers in Low Cost 1x9 Package Style
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