參數(shù)資料
型號(hào): HEF4724BT
廠商: NXP SEMICONDUCTORS
元件分類: 通用總線功能
英文描述: 8-bit addressable latch
中文描述: 4000/14000/40000 SERIES, LOW LEVEL TRIGGERED D LATCH, TRUE OUTPUT, PDSO16
封裝: PLASTIC, SOT109-1, SO-16
文件頁(yè)數(shù): 5/7頁(yè)
文件大?。?/td> 71K
代理商: HEF4724BT
January 1995
5
Philips Semiconductors
Product specification
8-bit addressable latch
HEF4724B
MSI
AC CHARACTERISTICS
V
SS
= 0 V; T
amb
= 25
°
C; input transition times
20 ns
AC CHARACTERISTICS
V
SS
= 0 V; T
amb
= 25
°
C; C
L
= 50 pF; input transition times
20 ns
V
DD
V
TYPICAL FORMULA FOR P (
μ
W)
Dynamic power
dissipation per
package (P)
5
700 f
i
+ ∑
(f
o
C
L
)
×
V
DD2
3700 f
i
+ ∑
(f
o
C
L
)
×
V
DD2
10 800 f
i
+ ∑
(f
o
C
L
)
×
V
DD2
where
f
i
= input freq. (MHz)
f
o
= output freq. (MHz)
C
L
= load capacitance (pF)
(f
o
C
L
) = sum of outputs
V
DD
= supply voltage (V)
10
15
V
DD
V
SYMBOL
MIN.
TYP.
MAX.
TYPICAL EXTRAPOLATION
FORMULA
Propagation delays
E
O
n
HIGH to LOW
5
115
50
35
95
40
30
95
35
25
85
35
25
110
45
35
95
40
30
85
35
25
230
95
70
195
80
55
190
75
55
170
75
55
225
95
70
190
80
55
165
70
50
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
88 ns
+
(0,55 ns/pF) C
L
39 ns
+
(0,23 ns/pF) C
L
27 ns
+
(0,16 ns/pF) C
L
68 ns
+
(0,55 ns/pF) C
L
29 ns
+
(0,23 ns/pF) C
L
22 ns
+
(0,16 ns/pF) C
L
68 ns
+
(0,55 ns/pF) C
L
24 ns
+
(0,23 ns/pF) C
L
17 ns
+
(0,16 ns/pF) C
L
58 ns
+
(0,55 ns/pF) C
L
24 ns
+
(0,23 ns/pF) C
L
17 ns
+
(0,16 ns/pF) C
L
83 ns
+
(0,55 ns/pF) C
L
34 ns
+
(0,23 ns/pF) C
L
27 ns
+
(0,16 ns/pF) C
L
68 ns
+
(0,55 ns/pF) C
L
29 ns
+
(0,23 ns/pF) C
L
22 ns
+
(0,16 ns/pF) C
L
58 ns
+
(0,55 ns/pF) C
L
24 ns
+
(0,23 ns/pF) C
L
17 ns
+
(0,16 ns/pF) C
L
10
15
5
10
15
5
10
15
5
10
15
5
10
15
5
10
15
5
10
15
t
PHL
LOW to HIGH
t
PLH
D
O
n
HIGH to LOW
t
PHL
LOW to HIGH
t
PLH
A
n
O
n
HIGH to LOW
t
PHL
LOW to HIGH
t
PLH
CL
O
n
HIGH to LOW
t
PHL
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