參數(shù)資料
型號: HEF4040BP
廠商: NXP Semiconductors N.V.
元件分類: 通用總線功能
英文描述: 12-stage binary ripple counter
封裝: HEF4040BP<SOT38-4 (DIP16)|<<http://www.nxp.com/packages/SOT38-4.html<1<Always Pb-free,;HEF4040BT<SOT109-1 (SO16)|<<http://www.nxp.com/packages/SOT109-1.html<1<week
文件頁數(shù): 1/14頁
文件大?。?/td> 103K
代理商: HEF4040BP
1. General description
The HEF4040B is a 12-stage binary ripple counter with a clock input (CP), an overriding
asynchronous master reset input (MR) and twelve fully buffered outputs (Q0 to Q11). The
counter advances on the HIGH-to-LOW transition of CP. A HIGH on MR clears all counter
stages and forces all outputs LOW, independent of CP. Each counter stage is a static
toggle flip-flop. The clock input is highly tolerant of slow rise and fall times due to its
Schmitt trigger action.
It operates over a recommended V
DD
power supply range of 3 V to 15 V referenced to V
SS
(usually ground). Unused inputs must be connected to V
DD
, V
SS
, or another input. It is
also suitable for use over the full industrial (
40
C to +85
C) temperature range.
2. Features and benefits
Tolerant of slow clock rise and fall time
Fully static operation
5 V, 10 V, and 15 V parametric ratings
Standardized symmetrical output characteristics
Operates across the full industrial temperature range
40
C to +85
C
Complies with JEDEC standard JESD 13-B
3. Applications
Frequency dividing circuits
Time delay circuits
Control counters
4. Ordering information
HEF4040B
12-stage binary ripple counter
Rev. 7 — 10 October 2011
Product data sheet
Table 1.
All types operate from
40
C to +85
C.
Type number
Package
Name
HEF4040BP
DIP16
HEF4040BT
SO16
Ordering information
Description
plastic dual in-line package; 16 leads (300 mil)
plastic small outline package; 16 leads; body width 3.9 mm
Version
SOT38-4
SOT109-1
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PDF描述
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