參數(shù)資料
型號(hào): HE84G763(S)
文件頁(yè)數(shù): 6/52頁(yè)
文件大小: 631K
代理商: HE84G763(S)
KING BILLION ELECTRONICS CO., LTD
駿
HE84G761
HE80004 Series
June 30, 2003
This specification is subject to change without notice. Please contact sales person for the latest version before use.
6
V1.01
Pin Name
Pin # I/O
Description
CMSG[32..79]
95~142 O
COM[32..79] pads are shared with SEG[95..48] outputs. The functions of the pads to be
COM drivers or SEG drivers can be selected by mask option MO_COM[1..0]. Please
refer to LCD driver configuration for details.
SEG[47..40]/D[7..0]
143~
150
151~
174
O LCD segment SEG[47..40] outputs share pads with data bus D[7..0] of external memory.
SEG[39..16]/A[23..0]
O
LCD segment SEG[39..16] outputs share pads with address bus A[23..0] of external
memory.
Output Enable control of external memory shares pad with SEG[15]. The function of the
pin is selected by mask option MO_EXMEM.
When used as Output Enable control pin, this pin control the tri-state buffer of external
memory data bus.
Write Enable control of external memory shares pad with SEG[14]. The function of the
pin is selected by mask option MO_ EXMEM.
When used as Write Enable control pin, this pin controls Write Enable input of the
external memory device.
Chip Select 0 of external memory shares pad with SEG[13]. The function of the pin is
selected by mask option MO_ EXMEM.
When used as Chip Enable control pin, this pin select or de-select the external memory
device based on the address been accessed.
Chip Select 1 of external memory shares pad with SEG[12]. The function of the pin is
selected by mask option MO_ EXMEM.
When used as Chip Enable control pin, this pin select or de-select the external memory
device based on the address been accessed.
Chip Select 2 of external memory shares pad with SEG[11]. The function of the pin is
selected by mask option MO_ EXMEM.
When used as Chip Enable control pin, this pin select or de-select the external memory
device based on the address been accessed.
Chip Select 3 of external memory shares pad with SEG[10]. The function of the pin is
selected by mask option MO_ EXMEM.
When used as Chip Enable control pin, this pin select or de-select the external memory
device based on the address been accessed.
2-bit bi-directional I/O port 15 is shared with LCD segment pads SEG[9..8]. The function
of the pad can be selected individually by mask options MO_LIO15[1..0]. (‘1’ for LCD
and ‘0’ for I/O).
The output type of I/O pad can also be selected by mask option MO_15PP[1..0] (1 for
push-pull and ‘0’ for open-drain).
As the output structure of I/O pad does not contain tri-state buffer. When using the I/O as
input, “1” must be outputted before reading.
8-bit bi-directional I/O port 17 is shared with LCD segment pads SEG[7..0]. The function
of the pad can be selected individually by mask options MO_LIO17[7..0]. (‘1’ for LCD
and ‘0’ for I/O).
The output type of I/O pad can also be selected by mask option MO_17PP[7..0] (1 for
push-pull and ‘0’ for open-drain).
As the output structure of I/O pad does not contain tri-state buffer. When using the I/O as
input, “1” must be outputted before reading.
I: Input, O: Output, B: Bidirectional, P: Power.
5.
ROM Map Configurations
OE/SEG15
175
O
WE/SEG14
176
O
CS0/SEG13
177
O
CS1/SEG12
178
O
CS2/SEG11
179
O
CS3/SEG10
180
O
PRT15[1..0]/SEG[9..8] 182
B/
O
PRT17[7..0]/SEG[7..0]
183~
188, 1,
2
B/
O
The chip has built-in 384K bytes internal ROM. In addition, address and data buses are provided to access
External ROM. The MCU can access up to 4M bytes program ROM and up to 16M bytes data space
through external buses. The SEG[47..40], SEG[39..16] pads are used as either data and address buses for
external ROM or LCD segment driver pads depending on the mask option MO_EXMEM. When the
external ROM mask option is selected, the MCU will retrieve the instructions and data from external
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