參數(shù)資料
型號： HE84G763(S)
文件頁數(shù)： 38/52頁
文件大?。?/td> 631K
代理商： HE84G763(S)
KING BILLION ELECTRONICS CO., LTD
駿
億
電
子
股
份
有
限
公
司
HE84G761
HE80004 Series
June 30, 2003
This specification is subject to change without notice. Please contact sales person for the latest version before use.
38
V1.01
0
1
Disable LVR
Enable LVR
The voltage detection circuit is temperature compensated to prevent the detection voltage from drifting
with temperature variation.
Vdet
Vrst
VDD
Vrls
19.
Infrared output
To achieve an IR output with programmable frequency and duty cycle, two 7-bit registers are employed
here. The IRH register represents the period (on FCK clock number) of output high, while IRL register
represents the period of output low. With this mechanism, the output IR frequency is equal to
FCK/(IRH+IRL), and the high duty cycle ratio is equal to IRH/(IRH+IRL). To make the IRO as output
pin alone, either IRH or IRL can be set as 0. When IRH is 0, the IRO output is a DC low. On the contrary,
if IRL is 0, the output is a DC high. Special care in hardware implementation is also taken according to
the MO_IRO (mask option to determine the default state of the IRO) to avoid glitch when PWM output is
disabled.
MUX
1
0
IRH
IRL
IRO
IRO
Counter
7-bit
CK
R
D
Q
Fck
Counter+1
Compare
IR
generator
reset
Toggle signal
M
I
I
IRO
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