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參數(shù)資料
| 型號(hào)： | HD74SSTL16837 |
| 廠商： | Hitachi,Ltd. |
| 英文描述： | 20-bit SSTL_3 Interface Universal Bus Driver with 3-state Outputs(20位 SSTL_3 通用總線驅(qū)動(dòng)器帶三態(tài)輸出) |
| 中文描述： | 20位SSTL_3接口通用總線驅(qū)動(dòng)器，三態(tài)輸出（20位SSTL_3通用總線驅(qū)動(dòng)器帶三態(tài)輸出） |
| 文件頁(yè)數(shù)： | 1/13頁(yè) |
| 文件大?。?/td> | 86K |
| 代理商： | HD74SSTL16837 |
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HD74SSTL16837
20-bit SSTL_3 Interface Universal Bus Driver
with 3-state Outputs
ADE-205-191 (Z)
Preliminary 1st. Edition
July 1, 1997
Description
The HD74SSTL16837 is a 20-bit universal bus driver designed for 3.0 V to 3.6 V Vcc operation and
SSTL_3 or LVTTL I/O levels.
Data flow from A to Y is controlled by the output enable (
OE
). The device operates in the transparent mode
when latch enable (LE) is high. The A data is latched if the LE is low and clock (CLK) is held at a high or
low logic level. If the LE is low, the A data is stored in the latch/flip flop on the low to high transition of
the CLK. When
OE
is high, the outputs are in the high-impedance state.
To ensure the high impedance state during power up or power down,
OE
should be tied to Vcc through a
pull-up resistor; the minimum value of the resistor is determined by the current sinking capability of the
driver.
Features
Supports SSTL_3 signal inputs and outputs
Flow through architecture optimizes PCB layout
Meets SSTL_3 Class I and Class II specifications
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