參數(shù)資料
型號: HD74HC131
廠商: Hitachi,Ltd.
元件分類: 通用總線功能
英文描述: Synchronous 4-Bit Up/Down Binary Counters With Dual Clock 16-CDIP -55 to 125
中文描述: 3至8線解碼器/解復(fù)用器的邊沿觸發(fā)地址寄存器
文件頁數(shù): 1/9頁
文件大?。?/td> 58K
代理商: HD74HC131
HD74HC131
3-to-8-line Decoder/Demultiplexer with Edge-Triggered
Address Registers
Description
The HD74HC131 is 3-to-8 linedecoder. It has Address select inputs (A,B,C) and D type register.
Address select data store to D type registers, during the positive going transition of the clock pulse.
Output control (G
1
, G
2
) are independent of select input and CLK input, and when G
1
is low or G
2
= High,
all outputs is high.
Features
High Speed Operation: t
pd
(CLK to Y) = 20 ns typ (C
L
= 50 pF)
High Output Current: Fanout of 10 LSTTL Loads
Wide Operating Voltage: V
CC
= 2 V to 6 V
Low Input Current: 1 μA max
Low Quiescent Supply Current: I
CC
(static) = 4 μA max (Ta = 25°C)
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