參數(shù)資料
型號(hào)： HD66841
廠商： Hitachi,Ltd.
英文描述： LVIC-II (LCD Video Interface Controller)(LCD視頻控制器)
中文描述： LVIC - 2（液晶視頻接口控制器）（液晶顯示視頻控制器）
文件頁(yè)數(shù)： 37/62頁(yè)
文件大?。?/td> 185K
代理商： HD66841
HD66841
37
6. Horizontal Displayed Characters Register (R6, R7)
The horizontal displayed characters register (Figure 23) is composed of eight bits (R6, R7). It specifies the
number of characters displayed on one horizontal line, called the number of horizontal line, called the
number of horizontal displayed characters.
This register can specify even numbers only. In dual-screen modes (display modes 1, 6, and 16), the most
significant bit of this register is invalid. When writing into this register, shift (Nhd – 1) in the low-order
direction for one bit to cut off the least significant bit. Figure 24 shows how to write a value into the
register when Nhd = 90.
7. CL3 Pulse Width Register (R8)
The 4-bit CL3 pulse width register (Figure 25) specifies the high-level pulse width of the CL3 signal. In
TFT-type LCD modes, a data hold time is necessary and it is determined by the high-level pulse width of
the CL3 signal. The CL3 signal is output with the high-level pulse width specified by this register even
when the HD66841 is not in a TFT-type LCD mode.
Data bit
Value
3
2
1
0
3
2
1
0
R6
R7
Nhd – 1 without its least significant bit (Unit: Characters)
Figure 23 Horizontal Displayed Characters Register
Data bit
Value
3
0
2
0
1
1
0
0
3
1
2
1
1
0
0
0
R6
R7
1
0
1
1
0
0
1
90 – 1 = 89
Cut off
Figure 24 How to Write the Number of Horizontal Displayed Characters
Data bit
Value
3
2
1
0
R8
In TN-type LCD modes: Npw
In TFT-type LCD modes: Npw – 5
(Unit: Characters)
Npw: High-level pulse width of the CL3 signal
(number of dots while the CL3 signal is high
×
1/8)
Figure 25 CL3 Pulse Width Register
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