ii
2.8.6
Basic Timing......................................................................................................................
2.9.1
Overview..............................................................................................................
2.9.2
On-Chip Memory (ROM, RAM) .........................................................................
2.9.3
On-Chip Supporting Module Access Timing (Internal I/O Register 1 and 2).....
2.9.4
On-Chip Supporting Module Access Timing (Interna I/O Register 3)................
2.9.5
External Address Space Access Timing...............................................................
Usage Note ........................................................................................................................
2.10.1 TAS Instruction....................................................................................................
2.10.2 STM/LDM Instruction..........................................................................................
Power-Down State................................................................................................
68
69
69
69
71
73
74
74
74
74
2.9
2.10
Section 3
3.1
MCU Operating Modes
................................................................................
Overview............................................................................................................................
3.1.1
Operating Mode Selection....................................................................................
3.1.2
Register Configuration .........................................................................................
Register Descriptions.........................................................................................................
3.2.1
Mode Control Register (MDCR)..........................................................................
3.2.2
System Control Register (SYSCR)......................................................................
3.2.3
Bus Control Register (BCR) ................................................................................
3.2.4
Serial Timer Control Register (STCR).................................................................
Operating Mode Descriptions............................................................................................
3.3.1
Mode 1..................................................................................................................
3.3.2
Mode 2..................................................................................................................
3.3.3
Mode 3..................................................................................................................
Pin Functions in Each Operating Mode.............................................................................
Memory Map in Each Operating Mode.............................................................................
75
75
75
76
76
76
77
79
80
82
82
82
82
83
83
3.2
3.3
3.4
3.5
Section 4
4.1
Exception Handling
........................................................................................
Overview............................................................................................................................
4.1.1
Exception Handling Types and Priority...............................................................
4.1.2
Exception Handling Operation.............................................................................
4.1.3
Exception Sources and Vector Table....................................................................
Reset..................................................................................................................................
4.2.1
Overview..............................................................................................................
4.2.2
Reset Sequence.....................................................................................................
4.2.3
Interrupts after Reset............................................................................................
Interrupts............................................................................................................................
Trap Instruction .................................................................................................................
Stack Status after Exception Handling..............................................................................
Notes on Use of the Stack..................................................................................................
87
87
87
88
88
90
90
90
92
93
94
95
96
4.2
4.3
4.4
4.5
4.6
Section 5
5.1
Interrupt Controller
........................................................................................
Overview............................................................................................................................
97
97