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650
Table 24.2 DC Characteristics (3) (cont)
– Preliminary –
Conditions (Mask ROM version): V
CC = 2.7 V to 5.5 V, AVCC*
1 = 2.7 V to 5.5 V,
V
SS = AVSS*
1 = 0 V, T
a = –20 to +75°C
(Flash memory version):
V
CC = 3.0 V to 5.5 V*
7, AV
CC*
1 = 3.0 V to 5.5 V,
V
SS = AVSS*
1 = 0 V, T
a = –20 to +75°C*
7
Item
Symbol
Min
Typ
Max
Unit
Test Conditions
Current
dissipation*
8
Normal operation
I
CC
—
45
60
mA
f = 10 MHz,
H8S/2134 Series
—
50
70
mA
f = 10 MHz,
H8S/2138 Series
Sleep mode
—
35
50
mA
f = 10 MHz,
H8S/2134 Series
—
40
60
mA
f = 10 MHz,
H8S/2138 Series
Standby mode*
9
—
0.01
5.0
A
T
a ≤ 50°C
—
20.0
A
50°C < T
a
Analog
power
During A/D, D/A
conversion
Al
CC
—
3.2
7.0
mA
supply
current
Idle
—
0.01
5.0
A
AV
CC =
2.0 V to 5.5 V
Analog power supply voltage*
1
AV
CC
2.7
—
5.5
V
Operating
2.0
—
5.5
V
Idle/not used
RAM standby voltage
V
RAM
2.0
—
V
Notes:
1.
Do not leave the AVCC, and AVSS pins open even if the A/D converter and D/A converter are not
used.
Even if the A/D converter and D/A converter are not used, apply a value in the range
2.0 V to 5.5 V to AVCC by connection to the power supply (V
CC), or some other method.
2.
P67 to P60 include supporting module inputs multiplexed on those pins.
3.
,54 includes the $'75* signal multiplexed on that pin.
4.
In the H8S/2138 Series, P52/SCK0/SCL0 and P97/SDA0 are NMOS push-pull outputs.
An external pull-up resistor is necessary to provide high-level output from SCL0 and SDA0 (ICE = 1).
P52/SCK0 and P97 (ICE = 0) high levels are driven by NMOS.
5.
In the H8S/2138 Series, When ICE = 0. Low-level output when the bus drive function is selected is
determined separately.
6.
The upper limit of the port 6 applied voltage is V
CC + 0.3 V when CIN input is not selected, and the
lower of V
CC + 0.3 V and AVCC + 0.3 V when CIN input is selected. When a pin is in output mode, the
output voltage is equivalent to the applied voltage.
7.
For flash memory program/erase operations, the applicable ranges are V
CC = 3.0 V to 3.6 V, Ta = 0 to
+75°C.
8.
Current dissipation values are for V
IH min = VCC – 0.5 V and VIL max = 0.5 V with all output pins
unloaded and the on-chip pull-up MOSs in the off state.
9.
The values are for V
RAM ≤ VCC < 2.7 V, VIH min = VCC × 0.9, and VIL max = 0.3 V.