9.6
Port 5 ··································································································································159
9.6.1 Overview ·················································································································159
9.6.2 Port 5 Registers ·······································································································160
9.6.3 Pin Functions in Each Mode ···················································································161
9.6.4 Built-In MOS Pull-Up ·····························································································163
Port 6 ··································································································································165
9.7.1 Overview ·················································································································165
9.7.2 Port 6 Registers ·······································································································166
9.7.3 Pin Functions in Each Mode ···················································································170
9.7.4 Built-In MOS Pull-Up ·····························································································172
Port 7 ··································································································································173
9.8.1 Overview ·················································································································173
9.8.2 Port 7 Registers ·······································································································173
9.8.3 Pin Functions ··········································································································174
Port 8 ··································································································································177
9.9.1 Overview ·················································································································177
9.9.2 Port 8 Registers ·······································································································177
9.10 Port 9 ··································································································································178
9.10.1 Overview ·················································································································178
9.10.2 Port 9 Registers ·······································································································178
9.10.3 Pin Functions ··········································································································179
9.7
9.8
9.9
Section 10 16-Bit Free-Running Timers
10.1 Overview ····························································································································183
10.1.1 Features ···················································································································183
10.1.2 Block Diagram ········································································································184
10.1.3 Input and Output Pins ·····························································································185
10.1.4 Register Configuration ····························································································186
10.2 Register Descriptions ·········································································································187
10.2.1 Free-Running Counter (FRC)—H'FE92, H'FEA2, H'FEB2 ···································187
10.2.2 Output Compare Registers A and B (OCRA and OCRB)—H'FE94
and H'FE96, H'FEA4 and H'FEA6, H'FEB4 and H'FEB6 ······································188
10.2.3 Input Capture Register (ICR)—H'FE98, H'FEA8, H'FEB8 ···································188
10.2.4 Timer Control Register (TCR) ················································································189
10.2.5 Timer Control/Status Register (TCSR) ···································································191
10.3 CPU Interface ·····················································································································194
10.4 Operation ····························································································································196
10.4.1 FRC Incrementation Timing ···················································································196
10.4.2 Output Compare Timing ·························································································197
10.4.3 Input Capture Timing ······························································································199
10.4.4 Setting of FRC Overflow Flag (OVF) ····································································201