3-4
3-5
3-6
3-7
3-8
3-9
3-10
3-11
3-12
3-13
3-14
3-15
3-16
3-17
4-1 (a)
4-1 (b) Instruction Exceptions ·····································································································79
4-2
Exception Vector Table ····································································································82
4-3
Stack after Exception Handling Sequence ·······································································93
5-1
Interrupt Controller Registers ··························································································99
5-2
Interrupts, Vectors, and Priorities ··················································································103
5-3
Assignment of Interrupt Priority Registers ····································································104
5-4
Number of States before Interrupt Service ····································································112
6-1
Internal Control Registers of the DTC ···········································································114
6-2
Data Transfer Enable Registers ······················································································115
6-3
Assignment of Data Transfer Enable Registers ·····························································117
6-4
Addresses of DTC Vectors ·····························································································121
6-5
Number of States per Data Transfer ··············································································123
6-6
Number of States before Interrupt Service ····································································124
6-7
DTC Control Register Information Set in RAM ···························································125
7-1
Register Configuration ···································································································128
7-2
Wait Modes ····················································································································130
8-1 (1) External Crystal Parameters
(HD6475368R, HD6475348R, HD6435368R, HD6435348R) ·····································136
8-1 (2) External Crystal Parameters
(HD6475368S, HD6475348S, HD6435368S, HD6435348S) ·······································136
9-1
Input/Output Port Summary ··························································································142
9-2
Port 1 Registers ··············································································································144
9-3
Port 1 Pin Functions in Expanded Modes ······································································147
9-4
Port 1 Pin Functions in Single-Chip Modes ··································································149
9-5
Port 2 Registers ··············································································································151
9-6
Port 3 Registers ··············································································································154
General Register Data Formats ························································································42
Data Formats in Memory ·································································································43
Data Formats on the Stack ·······························································································44
Addressing Modes ···········································································································46
Effective Address Calculation ·························································································47
Instruction Classification ·································································································50
Data Transfer Instructions ·······························································································52
Arithmetic Instructions ····································································································53
Logic Operation Instructions ···························································································54
Shift Instructions ··············································································································55
Bit-Manipulation Instructions ··························································································56
Branching Instructions ·····································································································57
System Control Instructions ····························································································59
Short-Format Instructions and Equivalent General Formats ···········································62
Exceptions and Their Priority ··························································································79