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型號：	HD6433048
廠商：	Hitachi,Ltd.
英文描述：	Hitachi Single-Chip Microcomputer
中文描述：	日立單片機
文件頁數(shù)：	122/867頁
文件大?。?/td>	2771K
代理商：	HD6433048

5.5.2 Instructions that Inhibit Interrupts

The LDC, ANDC, ORC, and XORC instructions inhibit interrupts. When an interrupt occurs,

after determining the interrupt priority, the interrupt controller requests a CPU interrupt. If the

CPU is currently executing one of these interrupt-inhibiting instructions, however, when the

instruction is completed the CPU always continues by executing the next instruction.

5.5.3 Interrupts during EEPMOV Instruction Execution

The EEPMOV.B and EEPMOV.W instructions differ in their reaction to interrupt requests.

When the EEPMOV.B instruction is executing a transfer, no interrupts are accepted until the

transfer is completed, not even NMI.

When the EEPMOV.W instruction is executing a transfer, interrupt requests other than NMI are

not accepted until the transfer is completed. If NMI is requested, NMI exception handling starts at

a transfer cycle boundary. The PC value saved on the stack is the address of the next instruction.

Programs should be coded as follows to allow for NMI interrupts during EEPMOV.W execution:

5.5.4 Notes on External Interrupts during Use

If the IRQnF flag is at IRQnF = 1, after reading the IRQnF flag if the IRQnF flag writes 0 clear

status is reached. However, there are times when clear status occurs in error and interrupt

processing is not executed when the IRQnF flag is at 0 although IRQnF = 1 was not attained. This

occurs in when the following conditions are fulfilled.

Setting conditions

When using multiple external interrupts (IRQa, IRQb)

IRQaF flag clears because 0 is written, and IRQbF flag clears by the hardware.

IRQaF flag clears and bit operation command is being used for the IRQ status resistor (ISR)

or the ISR is being read in bytes; IRQaF flag's bits clear and other bit values read in bits are

written in bytes.

Occurrence conditions

When IRQaF = 1, for the IRQaF flag to clear, ISR resistor read is executed. Thereafter

interrupt processing is carried out and IRQbF flag clears.

相關代理商/技術參數(shù)	參數(shù)描述
HD6433048B	制造商:未知廠家制造商全稱:未知廠家功能描述:Microcomputer Development Environment System High-Performance Embedded Workshop 2 HEW Builder Users Manual/Cross tool
HD6433048F	制造商:未知廠家制造商全稱:未知廠家功能描述:32-Bit Microcontroller
HD6433048SF16	制造商:Renesas Electronics Corporation 功能描述:
HD6433048TF	制造商:未知廠家制造商全稱:未知廠家功能描述:32-Bit Microcontroller
HD6433048VF	制造商:未知廠家制造商全稱:未知廠家功能描述:32-Bit Microcontroller

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