參數(shù)資料
型號: HD404849
廠商: Hitachi,Ltd.
元件分類: 其它接口
英文描述: TERMINAL
中文描述: IGBT模塊
文件頁數(shù): 63/125頁
文件大小: 471K
代理商: HD404849
HD404849 Series
63
Timer B is initialized by writing to timer write register B (TWBL: $00A, TWBU: $00B). In this case,
the lower digit (TWBL) must be written to first, but writing only to the lower digit does not change the
timer B value. Timer B is initialized to the value in timer write register B at the same time the upper
digit (TWBU) is written to. When timer write register B is written to again and if the lower digit value
needs no change, writing only to the upper digit initializes timer B.
Bit
Initial value
Read/Write
Bit name
3
0
W
TWBL3
2
0
W
TWBL2
0
0
W
TWBL0
1
0
W
TWBL1
Timer write register B (lower digit) (TWBL: $00A)
Figure 46 Timer Write Register B Lower Digit (TWBL)
Bit
Initial value
Read/Write
Bit name
3
Undefined
W
TWBU3
2
Undefined
W
TWBU2
0
Undefined
W
TWBU0
1
Undefined
W
TWBU1
Timer write register B (upper digit) (TWBU: $00B)
Figure 47 Timer Write Register B Upper Digit (TWBU)
Timer read register B (TRBL: $00A, TRBU: $00B): Read-only register consisting of a lower digit
(TRBL) and upper digit (TRBU) that holds the count of the timer B upper digit. See figures 48 and 49.
The upper digit (TRBU) must be read first. At this time, the count of the timer B upper digit is
obtained, and the count of the timer B lower digit is latched to the lower digit (TRBL). After this, by
reading TRBL, the count of timer B when TRBU was read can be obtained.
Bit
Initial value
Read/Write
Bit name
3
Undefined
R
TRBL3
2
Undefined
R
TRBL2
0
Undefined
R
TRBL0
1
Undefined
R
TRBL1
Timer read register B (lower digit) (TRBL: $00A)
Figure 48 Timer Read Register B Lower Digit (TRBL)
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