參數(shù)資料
型號: HD404849
廠商: Hitachi,Ltd.
元件分類: 其它接口
英文描述: TERMINAL
中文描述: IGBT模塊
文件頁數(shù): 39/125頁
文件大?。?/td> 471K
代理商: HD404849
HD404849 Series
39
In figure 24, the level of the
INT
0
signal is sampled by an interrupt frame. In (a) the sampled value is
low at point A, and also low at point B. Therefore, a falling edge will not be detected. In (b), the
sampled value is high at point A, and also high at point B. A falling edge will not be detected in this
case either.
When the MCU is in watch mode or subactive mode, keep the high level and low level period of
INT
0
longer than the interrupt frame.
High
Low
INT
Sampling
0
Low
Figure 23 Edge Detection
A: Low
B: Low
INT
Interrupt
frame
0
A: High
B: High
INT
Interrupt
frame
0
a. High level period
b. Low level period
Figure 24 Sampling Example
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HD404849FS TERMINAL
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