參數(shù)資料
型號： HD4-15530-8
廠商： HARRIS SEMICONDUCTOR
元件分類： 網(wǎng)絡(luò)接口
英文描述： CMOS Manchester Encoder-Decoder
中文描述： DATACOM, MANCHESTER ENCODER/DECODER, CQCC28
文件頁數(shù)： 8/12頁
文件大小： 169K
代理商： HD4-15530-8
5-149
AC Electrical Specifications
V
CC
= 5V
±
10%, T
A
= -40
o
C to +85
o
C (HD-15530-9)
T
A
= -55
o
C to +125
o
C (HD-15530-8)
PARAMETER
SYMBOL
(NOTE 2)
TEST CONDITIONS
LIMITS
UNITS
MIN
MAX
ENCODER TIMING
Encoder Clock Frequency
FEC
V
CC
= 4.5V and 5.5V, C
L
= 50pF
-
15
MHz
Send Clock Frequency
FESC
V
CC
= 4.5V and 5.5V, C
L
= 50pF
-
2.5
MHz
Encoder Data Rate
FED
V
CC
= 4.5V and 5.5V, C
L
= 50pF
-
1.25
MHz
Master Reset Pulse Width
TMR
V
CC
= 4.5V and 5.5V, C
L
= 50pF
150
-
ns
Shift Clock Delay
TE1
V
CC
= 4.5V and 5.5V, C
L
= 50pF
-
125
ns
Serial Data Setup
TE2
V
CC
= 4.5V and 5.5V, C
L
= 50pF
75
-
ns
Serial Data Hold
TE3
V
CC
= 4.5V and 5.5V, C
L
= 50pF
75
-
ns
Enable Setup
TE4
V
CC
= 4.5V and 5.5V, C
L
= 50pF
90
-
ns
Enable Pulse Width
TE5
V
CC
= 4.5V and 5.5V, C
L
= 50pF
100
-
ns
Sync Setup
TE6
V
CC
= 4.5V and 5.5V, C
L
= 50pF
55
-
ns
Sync Pulse Width
TE7
V
CC
= 4.5V and 5.5V, C
L
= 50pF
150
-
ns
Send Data Delay
TE8
V
CC
= 4.5V and 5.5V, C
L
= 50pF
0
50
ns
Bipolar Output Delay
TE9
V
CC
= 4.5V and 5.5V, C
L
= 50pF
-
130
ns
Enable Hold
TE10
V
CC
= 4.5V and 5.5V, C
L
= 50pF
10
-
ns
Sync Hold
TE11
V
CC
= 4.5V and 5.5V, C
L
= 50pF
95
-
ns
DECODER TIMING
Decoder Clock Frequency
FDC
V
CC
= 4.5V and 5.5V, C
L
= 50pF
-
15
MHz
Decoder Data Rate
FDD
V
CC
= 4.5V and 5.5V, C
L
= 50pF
-
1.25
MHz
Decoder Reset Pulse Width
TDR
V
CC
= 4.5V and 5.5V, C
L
= 50pF
150
-
ns
Decoder Reset Setup Time
TDRS
V
CC
= 4.5V and 5.5V, C
L
= 50pF
75
-
ns
Decoder Reset Hold Time
TDRH
V
CC
= 4.5V and 5.5V, C
L
= 50pF
10
-
ns
Master Reset Pulse
TMR
V
CC
= 4.5V and 5.5V, C
L
= 50pF
150
-
ns
Bipolar Data Pulse Width
TD1
V
CC
= 4.5V and 5.5V, C
L
= 50pF
TDC + 10
(Note 1)
-
ns
One Zero Overlap
TD3
V
CC
= 4.5V and 5.5V, C
L
= 50pF
-
TDC - 10
(Note 1)
ns
Sync Delay (ON)
TD6
V
CC
= 4.5V and 5.5V, C
L
= 50pF
-20
110
ns
Take Data Delay (ON)
TD7
V
CC
= 4.5V and 5.5V, C
L
= 50pF
0
110
ns
Serial Data Out Delay
TD8
V
CC
= 4.5V and 5.5V, C
L
= 50pF
-
80
ns
Sync Delay (OFF)
TD9
V
CC
= 4.5V and 5.5V, C
L
= 50pF
0
110
ns
Take Data Delay (OFF)
TD10
V
CC
= 4.5V and 5.5V, C
L
= 50pF
0
110
ns
Valid Word Delay
TD11
V
CC
= 4.5V and 5.5V, C
L
= 50pF
0
110
ns
NOTES:
1. TDC = Decoder clock period = 1/FDC
2. AC Testing as follows: Input levels: V
IH
= 70% V
CC
, V
IL
= 20% V
CC
; Input rise/fall times driven at 1ns/V; Timing Reference levels: 1.5V;
Output load: C
L
= 50pF.
HD-15530
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