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參數(shù)資料
| 型號： | HD1-15531 |
| 英文描述： | ENCODER/DECODER|CMOS|DIP|40PIN|CERAMIC |
| 中文描述： | 編碼/解碼器|的CMOS |雙酯| 40PIN |陶瓷 |
| 文件頁數(shù)： | 1/16頁 |
| 文件大?。?/td> | 278K |
| 代理商： | HD1-15531 |
1
TM
March 1997
HD-15531
CMOS Manchester Encoder-Decoder
Features
Support of MIL-STD-1553
Data Rate (15531B) . . . . . . . . . . . . . . . .2.5 Megabit/Sec
Data Rate (15531). . . . . . . . . . . . . . . . .1.25 Megabit/Sec
Variable Frame Length to 32 Bits
Sync Identification and Lock-In
Separate Manchester II Encode, Decode
Low Operating Power . . . . . . . . . . . . . . . . . 50mW at 5V
Ordering Information
Description
The Intersil HD-15531 is a high performance CMOS device
intended to service the requirements of MIL-STD-1553 and
similar Manchester II encoded, time division multiplexed
serial data protocols. This LSI chip is divided into two sec-
tions, an Encoder and a Decoder. These sections operate
independently of each other, except for the master reset and
word length functions. This circuit provides many of the
requirements of MIL-STD-1553. The Encoder produces the
sync pulse and the parity bit as well as the encoding of the
data bits. The Decoder recognizes the sync pulse and identi-
fies it as well as decoding the data bits and checking parity.
The HD-15531 also surpasses the requirements of MIL-
STD-1553 by allowing the word length to be programmable
(from 2 to 28 data bits). A frame consists of three bits for
sync followed by the data word (2 to 28 data bits) followed by
one bit of parity, thus, the frame length will vary from 6 to 32
bit periods. This chip also allows selection of either even or
odd parity for the Encoder and Decoder separately.
This integrated circuit is fully guaranteed to support the
1MHz data rate of MIL-STD-1553 over both temperature and
voltage. For high speed applications the 15531B will support
a 2.5 Megabit/sec data rate.
The HD-15531 can also be used in many party line digital
data communications applications, such as a local area net-
work or an environmental control system driven from a single
twisted pair of fiber optic cable throughout a building.
PACKAGE
TEMP. RANGE
(
o
C)
1.25MBIT
/SEC
2.5MBIT
/SEC
PKG.
NO.
PDIP
-40
to 85
-
HD3-15531B-9
E40.6
CERDIP
-40
to 85
HD1-15531-9
HD1-15531B-9
F40.6
-55 to 125
HD1-15531-8
HD1-15531B-8
F40.6
DESC
(CERDIP)
-55 to 125
5962-
9054901MQA
HD1-15531
F40.6
-55 to 125
5962-
9054902MQA
HD1-15531B
F40.6
FN2961.1
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 321-724-7143
Intersil (and design) is a trademark of Intersil Americas Inc.
Copyright Intersil Americas Inc. 2002. All Rights Reserved
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PDF描述 |
|---|---|
| HD1-15531B-2 | Encoder/Decoder |
| HD1-6402B-9 | CMOS Universal Asynchronous Receiver Transmitter (UART) |
| HD1-6402R-9 | CMOS Universal Asynchronous Receiver Transmitter (UART) |
| HD3-6402B-9 | CMOS Universal Asynchronous Receiver Transmitter (UART) |
| HD3-6402R-9 | CMOS Universal Asynchronous Receiver Transmitter (UART) |
相關代理商/技術參數(shù) |
參數(shù)描述 |
|---|---|
| HD1-15531/883 | 制造商:INTERSIL 制造商全稱:Intersil Corporation 功能描述:CMOS Manchester Encoder-Decoder |
| HD1-15531-2 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Logic IC |
| HD1-15531-8 | 制造商:INTERSIL 制造商全稱:Intersil Corporation 功能描述:CMOS Manchester Encoder-Decoder |
| HD1-15531-9 | 制造商:Rochester Electronics LLC 功能描述:- Bulk |
| HD1-15531B | 制造商:INTERSIL 制造商全稱:Intersil Corporation 功能描述:CMOS Manchester Encoder-Decoder |
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