參數(shù)資料
型號(hào): HCS100
廠商: Microchip Technology Inc.
英文描述: Bi-directional Authenticator(雙向文電鑒別碼)
中文描述: 雙向認(rèn)證者(雙向文電鑒別碼)
文件頁數(shù): 113/170頁
文件大小: 4191K
代理商: HCS100
2003 Microchip Technology Inc.
Preliminary
DS40300C-page 111
PIC16F62X
BTFSS
Bit Test f, Skip if Set
Syntax:
[
label
] BTFSS f,b
Operands:
0
f
127
0
b < 7
Operation:
skip if (f<b>) = 1
Status Affected:
None
Encoding:
01
11bb
bfff
ffff
Description:
If bit 'b' in register 'f' is '1' then the
next instruction is skipped.
If bit 'b' is '1', then the next
instruction fetched during the
current instruction execution, is
discarded and a
NOP
is executed
instead, making this a two-cycle
instruction.
Words:
1
1
(2)
Cycles:
Example
HERE
FALSE
TRUE
BTFSS
GOTO
REG1
PROCESS_CODE
Before Instruction
PC = address
HERE
After Instruction
if FLAG<1> = 0,
PC =
if FLAG<1> = 1,
PC =
address
FALSE
address
TRUE
CALL
Call Subroutine
Syntax:
[
label
] CALL k
Operands:
0
k
2047
Operation:
(PC)+ 1
TOS,
k
PC<10:0>,
(PCLATH<4:3>)
PC<12:11>
Status Affected:
None
Encoding:
10
0kkk
kkkk
kkkk
Description:
Call Subroutine. First, return
address (PC+1) is pushed onto
the stack. The eleven bit
immediate address is loaded
into PC bits <10:0>. The upper
bits of the PC are loaded from
PCLATH.
CALL
is a two-cycle
instruction.
Words:
1
Cycles:
2
Example
HERE
CALL
THERE
Before Instruction
PC
After Instruction
PC
TOS =
=
Address
HERE
=
Address
THERE
Address
HERE+1
CLRF
Clear f
Syntax:
[
label
] CLRF f
Operands:
0
f
127
Operation:
00h
(f)
1
Z
Status Affected:
Z
Encoding:
00
0001
1fff
ffff
Description:
The contents of register 'f' are
cleared and the Z bit is set.
Words:
1
Cycles:
1
Example
CLRF
REG1
Before Instruction
REG1
After Instruction
REG1
Z
=
0x5A
=
=
0x00
1
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