參數(shù)資料
型號(hào)： HCD66750BP
廠商： Hitachi,Ltd.
英文描述： 128 x 128-dot Graphics LCD Controller/Driver with Four-grayscale Functions
中文描述： 128 × 128點(diǎn)圖形LCD控制器/驅(qū)動(dòng)器，四灰度函數(shù)
文件頁(yè)數(shù)： 9/96頁(yè)
文件大?。?/td> 2068K
代理商： HCD66750BP
￥ Chip size: 10.97 mm X 4.13 mm
￥ Pad coordinates: Pad center
￥ Coordinate origin: Chip center
￥ Au bump size: 40
μ
m x 90
μ
m
Chip corner bump size : 90
μ
m x 90
μ
m
(Dummy1, Dummy22, Dummy23 and Dummy 48)
￥ Au bump pitch: 60
μ
m (min.)
￥ Au bump height: 20
μ
m (typ.)
(Top view)
HD66750
Y
X
HD66750/1
HITACHI
9
HD66750 Pad Arrangement
C
C
C
C
C
C
C
C
C
C
C
C
C
C
C
C
C
C
C
C
SEG72/57
SEG69/60
SEG66/63
SEG63/66
SEG62/67
SEG58/71
SEG55/74
SEG52/77
SEG48/81
SEG45/84
SEG41/88
SEG37/92
SEG34/95
SEG30/99
SEG27/102
SEG24/105
SEG20/109
SEG19/110
SEG16/113
SEG13/116
SEG9/120
SEG6/123
SEG3/126
COM127/2
COM126/3
COM123/6
SEG128/1
SEG126/3
SEG125/4
SEG122/7
SEG118/11
SEG115/14
SEG111/18
SEG108/21
SEG105/24
SEG104/25
SEG101/28
SEG97/32
SEG94/35
SEG87/42
SEG84/45
SEG83/46
SEG79/50
SEG76/53
SEG73/56
SEG88/41
C
C
C
C
C
C
C
C
C
C
C
C
C
C
C
C
C
C
C
C
C
C
C
C
C
C
C
C
C
C
C
C
C
C
C
C
C
C
C
C
C
C
C
C
C
C
C
C
C
C
C
C
COM112/17
COM111/18
COM107/22
C
C
C
C
C
C
C
C
C
C
C
C
C
C
C
C
C
C
C
C
C
C
C
C
C
C
C
C
C
C
C
C
C
C
C
C
C
C
C
C
OSC2
OSC1
OSC1
Vcc
E/WR*
E/WR*
RW/RD*
RW/RD*
GND
GND
GND
GND
GND
GND
OSC2
RS
RS
CS*
CS*
RESET*
RESET*
DB0
DB0
DB1
DB1
DB2
DB2
DB3
DB3
DB4
DB4
DB5
DB5
DB6
DB6
DB7
DB7
GNDDUM1
IM1
IM1
IM0
IM0
VccDUM1
OPOFF
OPOFF
TEST
TEST
GNDDUM2
DB8
DB8
DB9
DB9
DB10
DB10
DB11
DB11
DB12
DB12
DB13
DB13
DB14
DB14
DB15
DB15
GNDDUM3
Dummy1
C1+
C1-
C2-
C1+
C2+
C2-
Vci
Vci
VTEST
Dummy11
C1-
VLOUT
V
LCD
V
LCD
Vcc
C3-
C3-
C3+
C3+
V1OUT
V2OUT
V3OUT
V4OUT
V5OUT
C4-
C4-
C4+
C5-
C5-
C5+
C5+
C6-
C6-
C6+
C6+
Dummy22
VLOUT
C2+
C4+
Dummy21
Dummy20
Dummy19
Dummy18
Dummy17
Dummy15
Dummy16
Dummy14
Dummy13
Dummy12
GND
GND
GND
Dummy2
Dummy3
Dummy4
Dummy5
Dummy6
Dummy7
Dummy8
Dummy9
Dummy10
Dummy28
Dummy24
Dummy23
Dummy31
Dummy32
Dummy48
Dummy47
Dummy46
Dummy45
Dummy42
Dummy38
(note)
This figure is shown pad arrangement from chip top view
which has Au-bumps and LSI pattern layer.
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