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參數(shù)資料
| 型號： | HB52E649E12 |
| 廠商： | Elpida Memory, Inc. |
| 元件分類： | 熱敏電阻 |
| 英文描述： | THERMISTOR, NTC; Series:B575; Thermistor type:NTC; Resistance:10kR; Tolerance, resistance:+/-1%; Beta value:3450; Temperature, lower limit, beta value:0(degree C); Temperature, upper limit, beta value:100(degree C); Temp, op. RoHS Compliant: Yes |
| 中文描述： | 注冊使用512 MB SDRAM的內(nèi)存64 Mword】72位，100 MHz的內(nèi)存總線，1銀模塊（18件64 M】4組件）PC100的SDRAM內(nèi)存 |
| 文件頁數(shù)： | 14/16頁 |
| 文件大?。?/td> | 147K |
| 代理商： | HB52E649E12 |
HB52E649E12-A6B/B6B
Data Sheet E0020H20
14
Pin Functions
CK0 to CK3 (input pin):
CK is the master clock input to this pin. The other input signals are referred at CK
rising edge.
S0
,
S2
(input pin):
When
S
is Low, the command input cycle becomes valid. When
S
is High, all inputs are
ignored. However, internal operations (bank active, burst operations, etc.) are held.
RE
,
CE
and
W
(input pins):
Although these pin names are the same as those of conventional DRAMs, they
function in a different way. These pins define operation commands (read, write, etc.) depending on the
combination of their voltage levels. For details, refer to the command operation section.
A0 to A12 (input pins):
Row address (AX0 to AX12) is determined by A0 to A12 level at the bank active
command cycle CK rising edge. Column address (AY0 to AY9, AY11) is determined by A0 to A9, A11 level
at the read or write command cycle CK rising edge. And this column address becomes burst access start
address. A10 defines the precharge mode. When A10 = High at the precharge command cycle, all banks are
precharged. But when A10 = Low at the precharge command cycle, only the bank that is selected by
BA0/BA1 (BA) is precharged.
BA0/BA1 (input pin):
BA0/BA1 are bank select signal (BA). The memory array is divided into bank 0,
bank 1, bank 2 and bank 3. If BA0 is Low and BA1 is Low, bank 0 is selected. If BA0 is High and BA1 is
Low, bank 1 is selected. If BA0 is Low and BA1 is High, bank 2 is selected. If BA0 is High and BA1 is
High, bank 3 is selected.
CKE0 (input pin):
This pin determines whether or not the next CK is valid. If CKE is High, the next CK
rising edge is valid. If CKE is Low, the next CK rising edge is invalid. This pin is used for power-down and
clock suspend modes.
DQMB0 to DQMB7 (input pins):
Read operation: If DQMB is High, the output buffer becomes High-Z. If
the DQMB is Low, the output buffer becomes Low-Z.
Write operation: If DQMB is High, the previous data is held (the new data is not written). If DQMB is Low,
the data is written.
DQ0 to DQ63, CB0 to CB7 (input/output pins):
Data is input to and output from these pins.
V
CC
(power supply pins):
3.3 V is applied.
V
SS
(power supply pins):
Ground is connected.
Detailed Operation Part
Refer to the HM5225165B/HM5225805B/HM5225405B-75/A6/B6 datasheet (E0082H).
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| HB52E649E12-A6B | 512 MB Registered SDRAM DIMM 64-Mword 】 72-bit, 100 MHz Memory Bus, 1-Bank Module (18 pcs of 64 M 】 4 Components) PC100 SDRAM |
| HB52E649E12-B6B | 512 MB Registered SDRAM DIMM 64-Mword 】 72-bit, 100 MHz Memory Bus, 1-Bank Module (18 pcs of 64 M 】 4 Components) PC100 SDRAM |
| HB52E649E12 | 512 MB Registered SDRAM DIMM(512 MB 寄存同步DRAM DIMM) |
| HB52F169E1 | 128 MB Registered SDRAM DIMM(128 MB 寄存同步DRAM DIMM) |
| HB52F649E1 | 512 MB Registered SDRAM DIMM 64-Mword 】 72-bit, 133 MHz Memory Bus, 1-Bank Module (18 pcs of 64 M 】 4 Components) PC133SDRAM |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| HB52E649E12-A6B | 制造商:ELPIDA 制造商全稱:Elpida Memory 功能描述:512 MB Registered SDRAM DIMM 64-Mword 】 72-bit, 100 MHz Memory Bus, 1-Bank Module (18 pcs of 64 M 】 4 Components) PC100 SDRAM |
| HB52E649E12-B6B | 制造商:ELPIDA 制造商全稱:Elpida Memory 功能描述:512 MB Registered SDRAM DIMM 64-Mword 】 72-bit, 100 MHz Memory Bus, 1-Bank Module (18 pcs of 64 M 】 4 Components) PC100 SDRAM |
| HB52E649EN-A6B | 制造商:ELPIDA 制造商全稱:Elpida Memory 功能描述:512 MB Unbuffered SDRAM DIMM, 100 MHz Memory Bus |
| HB52E649EN-B6B | 制造商:ELPIDA 制造商全稱:Elpida Memory 功能描述:512 MB Unbuffered SDRAM DIMM, 100 MHz Memory Bus |
| HB52E88EM-B6 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:x64 SDRAM Module |
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