參數(shù)資料
型號(hào)： HB288256C6
廠商： Hitachi,Ltd.
英文描述： ; Leaded Process Compatible:Yes
中文描述： CF卡⑩
文件頁數(shù)： 16/66頁
文件大?。?/td> 169K
代理商： HB288256C6
HB2881000/800/640/448/320/256/192/160/128/096/064/032A6
16
Configuration register specifications
This card supports four Configuration registers for the purpose of the configuration and observation of this
card. These registers can be used in memory card mode and I/O card mode. In True IDE mode, these
registers can not be used.
1. Configuration Option register (Address 200H)
This register is used for the configuration of the card configuration status and for the issuing soft reset to the
card.
bit7
bit6
bit5
bit4
bit3
bit2
bit1
bit0
SRESET
Note: initial value: 00H
LevlREQ
INDEX
Name
R/W
Function
SRESET
(HOST->)
R/W
Setting this bit to "1", places the card in the reset state (Card Hard Reset). This
operation is equal to Hard Reset, except this bit is not cleared. Then this bit set to "0",
places the card in the reset state of Hard Reset (This bit is set to "0" by Hard Reset) .
Card configuration status is reset and the card internal initialized operation starts when
Card Hard Reset is executed, so next access to the card should be the same sequence
as the power on sequence.
LevlREQ
(HOST->)
R/W
This bit sets to "0" when pulse mode interrupt is selected, and "1" when level mode
interrupt is selected.
INDEX
(HOST->)
R/W
This bits is used for select operation mode of the card as follows.
When Power on, Card Hard Reset and Soft Reset, this data is "000000" for the purpose
of Memory card interface recognition.
INDEX bit assignment
INDEX bit
5
4
3
2
1
0
Card mode
Task File register address
Mapping mode
0
0
0
0
0
0
Memory card
0H to FH, 400H to 7FFH
memory mapped
0
0
0
0
0
1
I/O card
xx0H to xxFH
contiguous I/O mapped
0
0
0
0
1
0
I/O card
1F0H to 1F7H, 3F6H to 3F7H
primary I/O mapped
0
0
0
0
1
1
I/O card
170H to 177H, 376H to 377H
secondary I/O mapped
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