參數(shù)資料
型號: GTLP6C817MTC
廠商: FAIRCHILD SEMICONDUCTOR CORP
元件分類: 時鐘及定時
英文描述: Low Drive GTLP-to-LVTTL 1:6 Clock Driver
中文描述: GTLP SERIES, LOW SKEW CLOCK DRIVER, 8 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PDSO24
封裝: 4.40 MM, MO-153, TSSOP-24
文件頁數(shù): 4/7頁
文件大?。?/td> 64K
代理商: GTLP6C817MTC
www.fairchildsemi.com
4
G
DC Electrical Characteristics
(Continued)
Note 4:
All typical values are at V
CC
=
3.3V and T
A
=
25
°
C.
Note 5:
GTLP V
REF
and V
TT
are specified to 2% tolerance since signal integrity and noise margin can be significantly degraded if these supplies are noisy.
In addition, V
TT
and R
TERM
can be adjusted to accommodate backplane impedances other than 50
, within the boundaries of not exceeding the DC Abso-
lute I
OL
ratings. Similarly V
REF
can be adjusted to compensate for changes in V
TT
.
AC Electrical Characteristics
Over recommended range of supply voltage and operating free air temperature. V
REF
=
1.0V (unless otherwise noted).
C
L
= 30 pF for OBn-Port and C
L
= 50 pF for OAn-Port.
From
Note 6:
All typical values are at V
CC
=
3.3 V and T
A
=
25
°
C.
Symbol
Test Conditions
Min
Typ
Max
Units
(Note 4)
I
CC
C
I
C
O
TTLIN
Control Pins/GTLPIN/TTLIN
V
CC
=
3.45V
V
I
=
V
CC
0.6
V
I
=
V
CC
or 0
V
I
=
V
CC
or 0
V
I
=
V
CC
or 0
2
mA
4.5
pF
OAn Port
OBn Port
6.0
8.0
Symbol
To
Min
Typ
Max
Units
(Input)
(Output)
(Note 6)
f
TOGGLE
TTLIN
OBn
175
MHz
GTLPIN
OAn
175
t
PLH
TTLIN
OBn
1.3
2.3
4.0
ns
t
PHL
0.9
2.6
4.3
t
PLH
OEB
OBn
1.5
2.6
4.1
ns
t
PHL
1.2
2.5
4.1
t
RISE
Transition Time, OB Outputs (20% to 80%)
1.3
ns
t
FALL
Transition Time, OB outputs (20% to 80%)
1.3
t
RISE
Transition Time, OA outputs (10% to 90%)
1.2
ns
t
FALL
Transition Time, OA outputs (10% to 90%)
2.0
t
PZH
, t
PZL
OEA
OAn
0.5
2.9
4.8
ns
t
PLZ
, t
PHZ
0.5
2.4
4.4
t
PLH
GTLPIN
OAn
1.9
3.6
5.7
ns
t
PHL
2.1
3.5
5.3
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